From: Paulo Zanoni <[email protected]> This is not needed. This sleep is probably here due to the many code changes that happened to the old intel_ddi_mode_set. We should sleep 20us after turning the PLLs on, and this is already implemented.
Signed-off-by: Paulo Zanoni <[email protected]> --- drivers/gpu/drm/i915/intel_ddi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 208f13f..33b3a75 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -782,8 +782,6 @@ static void intel_ddi_enable_pipe(struct intel_encoder *intel_encoder, I915_WRITE(PIPE_CLK_SEL(pipe), PIPE_CLK_SEL_PORT(port)); - udelay(20); - func_val = PIPE_DDI_FUNC_ENABLE | PIPE_DDI_SELECT_PORT(port); msa_val = PIPE_MSA_SYNC_CLK; -- 1.7.11.2 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
