From: Damien Lespiau <[email protected]>
Signed-off-by: Damien Lespiau <[email protected]>
---
tools/intel_reg_dumper.c | 31 +++++++++++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 098affa..d831733 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1310,6 +1310,33 @@ DEBUGSTRING(ironlake_debug_fdi_rx_misc)
snprintf(result, len, "FDI Delay %d", val & ((1 << 13) - 1));
}
+DEBUGSTRING(ironlake_debug_fdi_rx_iir)
+{
+ const char *aligned = val & FDI_RX_INTER_LANE_ALIGN ? "aligned " : "";
+ const char *symbol_locked = val & FDI_RX_SYMBOL_LOCK ?
+ "symbol locked " : "";
+ const char *bit_locked = val & FDI_RX_BIT_LOCK ? "bit locked " : "";
+ const char *tp2_failed = val & FDI_RX_TRAIN_PATTERN_2_FAIL ?
+ "tp2 failed " : "";
+ const char *fs_err = val & FDI_RX_FS_CODE_ERR ? "FS code error " : "";
+ const char *fe_err = val & FDI_RX_FE_CODE_ERR ? "FE code error " : "";
+ const char *ber_high = val & FDI_RX_SYMBOL_ERR_RATE_ABOVE ?
+ "BER high " : "";
+ const char *hdcp_fail = val & FDI_RX_HDCP_LINK_FAIL ?
+ "HDCP link failed " : "";
+ const char *fifo_overflow = val & FDI_RX_PIXEL_FIFO_OVERFLOW ?
+ "FIFO overflow " : "";
+ const char *xclock_overflow = val & FDI_RX_CROSS_CLOCK_OVERFLOW ?
+ "XClock overflow " : "";
+ const char *symbol_overflow = val & FDI_RX_SYMBOL_QUEUE_OVERFLOW ?
+ "Symbol overlfow " : "";
+
+ snprintf(result, len, "%s%s%s%s%s%s%s%s%s%s%s",
+ aligned, symbol_locked, bit_locked, tp2_failed, fs_err, fe_err,
+ ber_high, hdcp_fail, fifo_overflow, xclock_overflow,
+ symbol_overflow);
+}
+
DEBUGSTRING(ironlake_debug_transconf)
{
const char *enable = val & TRANS_ENABLE ? "enable" : "disable";
@@ -1788,9 +1815,9 @@ static struct reg_debug ironlake_debug_regs[] = {
DEFINEREG(FDI_PLL_CTL_1),
DEFINEREG(FDI_PLL_CTL_2),
- DEFINEREG(FDI_RXA_IIR),
+ DEFINEREG2(FDI_RXA_IIR, ironlake_debug_fdi_rx_iir),
DEFINEREG(FDI_RXA_IMR),
- DEFINEREG(FDI_RXB_IIR),
+ DEFINEREG2(FDI_RXB_IIR, ironlake_debug_fdi_rx_iir),
DEFINEREG(FDI_RXB_IMR),
DEFINEREG2(PCH_ADPA, i830_debug_adpa),
--
1.7.11.4
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