On Tue, Oct 03, 2017 at 05:57:11PM +0000, Imre Deak wrote: > On Tue, Oct 03, 2017 at 10:40:18AM -0700, Rodrigo Vivi wrote: > > On Tue, Oct 03, 2017 at 09:51:58AM +0000, Imre Deak wrote: > > > The DMC firmware program memory is lost after S3/S4 system suspend, so > > > we need to reprogram it during resume. > > > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103070 > > > Fixes: cebfcead63de ("drm/i915/DMC/CNL: Load DMC on CNL") > > > Cc: Anusha Srivatsa <[email protected]> > > > Cc: Animesh Manna <[email protected]> > > > Cc: Rodrigo Vivi <[email protected]> > > > Signed-off-by: Imre Deak <[email protected]> > > > --- > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > index 7933d1bc6a1c..3791c3f5f56d 100644 > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > @@ -2809,6 +2809,9 @@ static void cnl_display_core_init(struct > > > drm_i915_private *dev_priv, bool resume > > > > > > /* 6. Enable DBUF */ > > > gen9_dbuf_enable(dev_priv); > > > + > > > + if (resume && dev_priv->csr.dmc_payload) > > > + intel_csr_load_program(dev_priv); > > > > If this is needed for all platforms, couldn't we move that to > > intel_power_domains_init_hw()? > > so we don't forget future platforms? > > For GEN9_LP we also need to run the init sequence separately during > runtime resume, so these functions seem to be still the proper place to > call intel_csr_load_program().
ohh true... Reviewed-by: Rodrigo Vivi <[email protected]> > > > > > > } > > > > > > static void cnl_display_core_uninit(struct drm_i915_private *dev_priv) > > > -- > > > 2.13.2 > > > _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
