CRT being the only PCH encoder, we can simplify the crtc disable by
pushing the PCH encoder specific parts to CRT encoder.

v2: add hsw_disable_crt (Daniel), rebase

Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nik...@intel.com>
---
 drivers/gpu/drm/i915/intel_crt.c     | 18 ++++++++++++++++++
 drivers/gpu/drm/i915/intel_display.c |  6 ------
 2 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 6d57c92ac999..b43e8e16da37 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -213,6 +213,19 @@ static void pch_post_disable_crt(struct intel_encoder 
*encoder,
        intel_disable_crt(encoder, old_crtc_state, old_conn_state);
 }
 
+static void hsw_disable_crt(struct intel_encoder *encoder,
+                           const struct intel_crtc_state *old_crtc_state,
+                           const struct drm_connector_state *old_conn_state)
+{
+       struct drm_crtc *crtc = old_crtc_state->base.crtc;
+       struct drm_i915_private *dev_priv = to_i915(crtc->dev);
+       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+
+       WARN_ON(!intel_crtc->config->has_pch_encoder);
+
+       intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+}
+
 static void hsw_post_disable_crt(struct intel_encoder *encoder,
                                 const struct intel_crtc_state *old_crtc_state,
                                 const struct drm_connector_state 
*old_conn_state)
@@ -225,6 +238,10 @@ static void hsw_post_disable_crt(struct intel_encoder 
*encoder,
        lpt_disable_iclkip(dev_priv);
 
        intel_ddi_fdi_post_disable(encoder, old_crtc_state, old_conn_state);
+
+       WARN_ON(!old_crtc_state->has_pch_encoder);
+
+       intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
 }
 
 static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
@@ -953,6 +970,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
                crt->base.pre_pll_enable = hsw_pre_pll_enable_crt;
                crt->base.pre_enable = hsw_pre_enable_crt;
                crt->base.enable = hsw_enable_crt;
+               crt->base.disable = hsw_disable_crt;
                crt->base.post_disable = hsw_post_disable_crt;
        } else {
                crt->base.port = PORT_NONE;
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 6f275c930fd5..9058cdfb0649 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5669,9 +5669,6 @@ static void haswell_crtc_disable(struct intel_crtc_state 
*old_crtc_state,
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
 
-       if (intel_crtc->config->has_pch_encoder)
-               intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
-
        intel_encoders_disable(crtc, old_crtc_state, old_state);
 
        drm_crtc_vblank_off(crtc);
@@ -5696,9 +5693,6 @@ static void haswell_crtc_disable(struct intel_crtc_state 
*old_crtc_state,
                intel_ddi_disable_pipe_clock(intel_crtc->config);
 
        intel_encoders_post_disable(crtc, old_crtc_state, old_state);
-
-       if (old_crtc_state->has_pch_encoder)
-               intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
 }
 
 static void i9xx_pfit_enable(struct intel_crtc *crtc)
-- 
2.11.0

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