Signed-off-by: Matthew Auld <[email protected]>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 12 ++++++++++++
drivers/gpu/drm/i915/intel_pm.c | 12 ------------
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4c605785e2b3..87071d95845f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2154,6 +2154,18 @@ static void gtt_write_workarounds(struct
drm_i915_private *dev_priv)
I915_WRITE(GEN8_GAMW_ECO_DEV_RW_IA,
I915_READ(GEN8_GAMW_ECO_DEV_RW_IA) |
GAMW_ECO_ENABLE_64K_IPS_FIELD);
+
+ if (INTEL_GEN(dev_priv) >= 8) {
+ bool can_use_gtt_cache = true;
+
+ if (HAS_PAGE_SIZES(dev_priv, I915_GTT_PAGE_SIZE_2M) &&
+ IS_BROADWELL(dev_priv))
+ can_use_gtt_cache = false;
+
+ /* WaGttCachingOffByDefault */
+ I915_WRITE(HSW_GTT_CACHE_EN, can_use_gtt_cache ?
GTT_CACHE_EN_ALL : 0);
+ WARN_ON_ONCE(can_use_gtt_cache && I915_READ(HSW_GTT_CACHE_EN)
== 0);
+ }
}
int i915_ppgtt_init_hw(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9d0ca2656a23..cef8aa6bfc11 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8453,9 +8453,6 @@ static void skl_init_clock_gating(struct drm_i915_private
*dev_priv)
static void bdw_init_clock_gating(struct drm_i915_private *dev_priv)
{
- /* The GTT cache must be disabled if the system is using 2M pages. */
- bool can_use_gtt_cache = !HAS_PAGE_SIZES(dev_priv,
- I915_GTT_PAGE_SIZE_2M);
enum pipe pipe;
ilk_init_lp_watermarks(dev_priv);
@@ -8490,9 +8487,6 @@ static void bdw_init_clock_gating(struct drm_i915_private
*dev_priv)
/* WaProgramL3SqcReg1Default:bdw */
gen8_set_l3sqc_credits(dev_priv, 30, 2);
- /* WaGttCachingOffByDefault:bdw */
- I915_WRITE(HSW_GTT_CACHE_EN, can_use_gtt_cache ? GTT_CACHE_EN_ALL : 0);
-
/* WaKVMNotificationOnConfigChange:bdw */
I915_WRITE(CHICKEN_PAR2_1, I915_READ(CHICKEN_PAR2_1)
| KVM_CONFIG_CHANGE_NOTIFICATION_SELECT);
@@ -8765,12 +8759,6 @@ static void chv_init_clock_gating(struct
drm_i915_private *dev_priv)
* LSQC Setting Recommendations.
*/
gen8_set_l3sqc_credits(dev_priv, 38, 2);
-
- /*
- * GTT cache may not work with big pages, so if those
- * are ever enabled GTT cache may need to be disabled.
- */
- I915_WRITE(HSW_GTT_CACHE_EN, GTT_CACHE_EN_ALL);
}
static void g4x_init_clock_gating(struct drm_i915_private *dev_priv)
--
2.13.6
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