GuC submission, Interrupts and GuC communication are set up during intel_uc_init_hw. Keeping it ON during GPU reset might cause issues. To achieve uC sanitization w.r.t these functions prior to reset, disable these during intel_uc_sanitize. Also submission/interrupts are to be enabled only after sanitizing/ disabling with the state based checks protecting double enable/disable.
Signed-off-by: Sagar Arun Kamble <[email protected]> Cc: Michal Wajdeczko <[email protected]> Cc: Michał Winiarski <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> --- drivers/gpu/drm/i915/intel_uc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 0b799fe..00b54d0 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -453,10 +453,16 @@ void intel_uc_sanitize(struct drm_i915_private *dev_priv) { struct intel_uc_fw *guc_fw = &dev_priv->guc.fw; struct intel_uc_fw *huc_fw = &dev_priv->huc.fw; + struct intel_guc *guc = &dev_priv->guc; if (i915_modparams.enable_guc_loading) { - if (guc_fw->load_status == INTEL_UC_FIRMWARE_SUCCESS) + if (guc_fw->load_status == INTEL_UC_FIRMWARE_SUCCESS) { + i915_guc_submission_disable(dev_priv); + gen9_disable_guc_interrupts(dev_priv); + guc_disable_communication(guc); + i915_ggtt_disable_guc(dev_priv); + } guc_fw->load_status = INTEL_UC_FIRMWARE_NONE; huc_fw->load_status = INTEL_UC_FIRMWARE_NONE; -- 1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
