Op 08-11-17 om 16:38 schreef Daniel Vetter: > On Wed, Nov 08, 2017 at 10:29:21AM +0100, Maarten Lankhorst wrote: >> The firmware may have set up the pipe correctly, but the FIFO >> underrun and CRC interrupts are likely not enabled. >> >> This resulted in debugfs_test.read_all_entries failing on haswell, >> because of a timeout when reading the crc debugfs entry. >> >> Solve this by enabling FIFO underrun reporting after the initial >> fastset, which lets interrupts be generated as expected. >> >> Testcase: debugfs_test.read_all_entries >> Signed-off-by: Maarten Lankhorst <[email protected]> >> --- >> drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c >> b/drivers/gpu/drm/i915/intel_display.c >> index 737de251d0f8..8d42e6a910d4 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -12875,6 +12875,7 @@ static void intel_begin_crtc_commit(struct drm_crtc >> *crtc, >> static void intel_finish_crtc_commit(struct drm_crtc *crtc, >> struct drm_crtc_state *old_crtc_state) >> { >> + struct drm_i915_private *dev_priv = to_i915(crtc->dev); >> struct intel_crtc *intel_crtc = to_intel_crtc(crtc); >> struct intel_atomic_state *old_intel_state = >> to_intel_atomic_state(old_crtc_state->state); >> @@ -12882,6 +12883,15 @@ static void intel_finish_crtc_commit(struct >> drm_crtc *crtc, >> intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc); >> >> intel_pipe_update_end(new_crtc_state); >> + >> + if (HAS_PCH_SPLIT(dev_priv) && new_crtc_state->update_pipe && > The HAS_PCH_SPLIT looks very wrong. Just enable fifo underrun reporting > already for the relevant pipes. I think really the only check you need > here is for I915_MODE_FLAG_INHERITED and then the has_pch_encoder check > too. Everything else looks like cargo culting conditions. > > Note that at driver boot-up _all_ fifo underrun reporting is disabled by > default, so we really need to enable it everywhere explicitly. > > Placement looks good since it's after the wm update. That's really the > only reason we don't enable it straight at driver load, since we don't > entirely trust the firmware wm settings. > -Daniel Ack, only reason I had it was for has_pch_encoder, but makes sense to enable it on all platforms. :) >> + !needs_modeset(&new_crtc_state->base) && >> + old_crtc_state->mode.private_flags & I915_MODE_FLAG_INHERITED) { >> + intel_set_cpu_fifo_underrun_reporting(dev_priv, >> intel_crtc->pipe, true); >> + >> + if (new_crtc_state->has_pch_encoder && !HAS_DDI(dev_priv)) >> + intel_set_pch_fifo_underrun_reporting(dev_priv, >> intel_crtc->pipe, true); >> + } >> } >> >> /** >> -- >> 2.15.0 >> >> _______________________________________________ >> Intel-gfx mailing list >> [email protected] >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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