On Thu, Nov 09, 2017 at 05:24:57PM +0100, Maarten Lankhorst wrote: > The firmware may have set up the pipe correctly, but the FIFO > underrun and CRC interrupts are likely not enabled. > > This resulted in debugfs_test.read_all_entries failing on haswell, > because of a timeout when reading the crc debugfs entry. > > Solve this by enabling FIFO underrun reporting after the initial > fastset, which lets interrupts be generated as expected. > > Changes since v1: > - Always enable CPU FIFO underrun reporting for >GEN2, > and handle GEN2 correctly.
"Correct" is a strong word to use here. I think I should have the actually correct thing somewhere... git://github.com/vsyrjala/linux.git gen2_fifo_underrun Though it seems I haven't managed to write proper commit messages for it yet. > > Testcase: debugfs_test.read_all_entries > Signed-off-by: Maarten Lankhorst <[email protected]> > --- > drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 3af1e3f74dbb..58bce253f4a8 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -12905,6 +12905,7 @@ static void intel_begin_crtc_commit(struct drm_crtc > *crtc, > static void intel_finish_crtc_commit(struct drm_crtc *crtc, > struct drm_crtc_state *old_crtc_state) > { > + struct drm_i915_private *dev_priv = to_i915(crtc->dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > struct intel_atomic_state *old_intel_state = > to_intel_atomic_state(old_crtc_state->state); > @@ -12912,6 +12913,17 @@ static void intel_finish_crtc_commit(struct drm_crtc > *crtc, > intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc); > > intel_pipe_update_end(new_crtc_state); > + > + if (new_crtc_state->update_pipe && > + !needs_modeset(&new_crtc_state->base) && > + old_crtc_state->mode.private_flags & I915_MODE_FLAG_INHERITED) { > + if (!IS_GEN2(dev_priv) || > + new_crtc_state->active_planes & BIT(PLANE_PRIMARY)) > + intel_set_cpu_fifo_underrun_reporting(dev_priv, > intel_crtc->pipe, true); > + > + if (new_crtc_state->has_pch_encoder && !HAS_DDI(dev_priv)) > + intel_set_pch_fifo_underrun_reporting(dev_priv, > intel_crtc->pipe, true); I quite dislike having so many platform checks in high level common code. Maybe we should have some kind of intel_initial_modeset_done() thing or something? I don't quite see why that !DDI check is here either. > + } > } > > /** > -- > 2.15.0 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
