Unifying the various seq_puts messages in debugfs to a common one for
feature support.
v2: Clarifying the commit message (Anusha)
v3: Re-factoring code as per review (Michal)
v4: Rebase
v5: Split from following patch
v6: Re-factoring code (Michal, Sagar)
Clarifying commit message (Sagar)
v7: Generalizing subject to drm/i915 (Sagar)
v8: Omitting DRRS seq_puts unification (Michal)
v9: Including the HAS_HUC condition (Michal)
Updating more functions with unified message (Sagar)
v10: Sepearating from patch series
Reverting macro changes
Suggested by : Michal Wajdeczko <[email protected]>
Signed-off-by: Sujaritha Sundaresan <[email protected]>
Cc: Anusha Srivatsa <[email protected]>
Cc: Daniele Ceraolo Spurio <[email protected]>
Cc: Michal Wajdeczko <[email protected]>
Cc: Oscar Mateo <[email protected]>
Cc: Sagar Arun Kamble <[email protected]>
---
drivers/gpu/drm/i915/i915_debugfs.c | 49 +++++++++++++++++++++++++------------
1 file changed, 34 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index ff8f508..a029842 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1641,7 +1641,7 @@ static int i915_fbc_status(struct seq_file *m, void
*unused)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
if (!HAS_FBC(dev_priv)) {
- seq_puts(m, "FBC unsupported on this chipset\n");
+ seq_puts(m, "not supported\n");
return 0;
}
@@ -1809,7 +1809,7 @@ static int i915_ring_freq_table(struct seq_file *m, void
*unused)
unsigned int max_gpu_freq, min_gpu_freq;
if (!HAS_LLC(dev_priv)) {
- seq_puts(m, "unsupported on this chipset\n");
+ seq_puts(m, "not supported\n");
return 0;
}
@@ -2360,8 +2360,10 @@ static int i915_huc_load_status_info(struct seq_file *m,
void *data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct drm_printer p;
- if (!HAS_HUC_UCODE(dev_priv))
+ if (!HAS_HUC_UCODE(dev_priv)) {
+ seq_puts(m, "not supported\n");
return 0;
+ }
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->huc.fw, &p);
@@ -2379,8 +2381,10 @@ static int i915_guc_load_status_info(struct seq_file *m,
void *data)
struct drm_printer p;
u32 tmp, i;
- if (!HAS_GUC_UCODE(dev_priv))
+ if (!HAS_GUC_UCODE(dev_priv)) {
+ seq_puts(m, "not supported\n");
return 0;
+ }
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->guc.fw, &p);
@@ -2460,9 +2464,11 @@ static bool check_guc_submission(struct seq_file *m)
if (!guc->execbuf_client) {
seq_printf(m, "GuC submission %s\n",
+ HAS_GUC(dev_priv) ?
+ "not supported" :
HAS_GUC_SCHED(dev_priv) ?
"disabled" :
- "not supported");
+ "failed");
return false;
}
@@ -2651,7 +2657,7 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
bool enabled = false;
if (!HAS_PSR(dev_priv)) {
- seq_puts(m, "PSR not supported\n");
+ seq_puts(m, "not supported\n");
return 0;
}
@@ -2828,7 +2834,7 @@ static int i915_runtime_pm_status(struct seq_file *m,
void *unused)
struct pci_dev *pdev = dev_priv->drm.pdev;
if (!HAS_RUNTIME_PM(dev_priv))
- seq_puts(m, "Runtime power management not supported\n");
+ seq_puts(m, "not supported\n");
seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->gt.awake));
seq_printf(m, "IRQs disabled: %s\n",
@@ -3432,9 +3438,12 @@ static int i915_ipc_status_show(struct seq_file *m, void
*data)
static int i915_ipc_status_open(struct inode *inode, struct file *file)
{
struct drm_i915_private *dev_priv = inode->i_private;
+ struct seq_file *m;
- if (!HAS_IPC(dev_priv))
- return -ENODEV;
+ if (!HAS_IPC(dev_priv)) {
+ seq_puts(m, "not supported\n");
+ return 0;
+ }
return single_open(file, i915_ipc_status_show, dev_priv);
}
@@ -3939,9 +3948,12 @@ static int cur_wm_latency_show(struct seq_file *m, void
*data)
static int pri_wm_latency_open(struct inode *inode, struct file *file)
{
struct drm_i915_private *dev_priv = inode->i_private;
+ struct seq_file *m;
- if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv))
- return -ENODEV;
+ if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) {
+ seq_puts(m, "not supported\n");
+ return 0;
+ }
return single_open(file, pri_wm_latency_show, dev_priv);
}
@@ -3949,9 +3961,13 @@ static int pri_wm_latency_open(struct inode *inode,
struct file *file)
static int spr_wm_latency_open(struct inode *inode, struct file *file)
{
struct drm_i915_private *dev_priv = inode->i_private;
+ struct seq_file *m;
+
+ if (HAS_GMCH_DISPLAY(dev_priv)) {
+ seq_puts(m, "not supported\n");
+ return 0;
+ }
- if (HAS_GMCH_DISPLAY(dev_priv))
- return -ENODEV;
return single_open(file, spr_wm_latency_show, dev_priv);
}
@@ -3959,9 +3975,12 @@ static int spr_wm_latency_open(struct inode *inode,
struct file *file)
static int cur_wm_latency_open(struct inode *inode, struct file *file)
{
struct drm_i915_private *dev_priv = inode->i_private;
+ struct seq_file *m;
- if (HAS_GMCH_DISPLAY(dev_priv))
- return -ENODEV;
+ if (HAS_GMCH_DISPLAY(dev_priv)) {
+ seq_puts(m, "not supported\n");
+ return 0;
+ }
return single_open(file, cur_wm_latency_show, dev_priv);
}
--
1.9.1
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