Signed-off-by: Maarten Lankhorst <[email protected]>
---
drivers/gpu/drm/i915/intel_display.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 8283e80597bd..38a1cdb3dbb2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5044,7 +5044,7 @@ static void intel_post_plane_update(struct
intel_crtc_state *old_crtc_state)
intel_fbc_post_update(crtc);
if (primary_state->base.visible &&
- (needs_modeset(&pipe_config->base) ||
+ (pipe_config->disable_cxsr ||
!old_primary_state->base.visible))
intel_post_enable_primary(&crtc->base, pipe_config);
}
@@ -5064,7 +5064,7 @@ static void intel_pre_plane_update(struct
intel_crtc_state *old_crtc_state,
struct intel_atomic_state *old_intel_state =
to_intel_atomic_state(old_state);
- if (needs_modeset(&pipe_config->base) || !pipe_config->ips_enabled)
+ if (pipe_config->disable_cxsr || !pipe_config->ips_enabled)
hsw_disable_ips(old_crtc_state);
if (old_pri_state) {
@@ -6224,12 +6224,11 @@ static bool pipe_config_supports_ips(struct
drm_i915_private *dev_priv,
visible_planes = pipe_config->active_planes & ~BIT(PLANE_CURSOR);
/*
- * FIXME IPS should be fine as long as one plane is
- * enabled, but in practice it seems to have problems
- * when going from primary only to sprite only and vice
- * versa.
+ * IPS should be fine as long as one plane is enabled, but
+ * temporarily disable it when when going from primary only
+ * to sprite only and vice versa.
*/
- if (visible_planes != BIT(PLANE_PRIMARY))
+ if (hweight32(visible_planes) != 1)
return false;
/* HSW can handle pixel rate up to cdclk? */
--
2.15.0
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