On Mon, Jan 22, 2018 at 12:32:57PM -0800, Michel Thierry wrote:
> Newer platforms may have subtle offset changes, which will increase the
> number of defines, so it is probably better to start moving them to its
> own header file. Also move the macros used while setting the reg state.
> 
> v2: Rename to intel_lrc_reg.h, to be consistent with i915_reg.h and
> intel_guc_reg.h (Chris)
> 
> Signed-off-by: Michel Thierry <michel.thie...@intel.com>
> Cc: Michal Wajdeczko <michal.wajdec...@intel.com>
> Cc: Lucas De Marchi <lucas.demar...@intel.com>
> Cc: Chris Wilson <ch...@chris-wilson.co.uk>
> ---

[ ... ]

> diff --git a/drivers/gpu/drm/i915/intel_lrc_reg.h 
> b/drivers/gpu/drm/i915/intel_lrc_reg.h
> new file mode 100644
> index 000000000000..f50d63cb4b66
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_lrc_reg.h
> @@ -0,0 +1,78 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2018 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> + * DEALINGS IN THE SOFTWARE.
> + */

Looking at other files added after the SPDX change, it doesn't look
like we should duplicate the information about license. So in this case
AFAIU it should contain only the SPDX tag and the Copyright, but not
license text. See

git log --grep "Remove redundant license text"


Lucas De Marchi


> +
> +#ifndef _INTEL_LRC_REG_H_
> +#define _INTEL_LRC_REG_H_
> +
> +/* GEN8+ Reg State Context */
> +#define CTX_LRI_HEADER_0             0x01
> +#define CTX_CONTEXT_CONTROL          0x02
> +#define CTX_RING_HEAD                        0x04
> +#define CTX_RING_TAIL                        0x06
> +#define CTX_RING_BUFFER_START                0x08
> +#define CTX_RING_BUFFER_CONTROL              0x0a
> +#define CTX_BB_HEAD_U                        0x0c
> +#define CTX_BB_HEAD_L                        0x0e
> +#define CTX_BB_STATE                 0x10
> +#define CTX_SECOND_BB_HEAD_U         0x12
> +#define CTX_SECOND_BB_HEAD_L         0x14
> +#define CTX_SECOND_BB_STATE          0x16
> +#define CTX_BB_PER_CTX_PTR           0x18
> +#define CTX_RCS_INDIRECT_CTX         0x1a
> +#define CTX_RCS_INDIRECT_CTX_OFFSET  0x1c
> +#define CTX_LRI_HEADER_1             0x21
> +#define CTX_CTX_TIMESTAMP            0x22
> +#define CTX_PDP3_UDW                 0x24
> +#define CTX_PDP3_LDW                 0x26
> +#define CTX_PDP2_UDW                 0x28
> +#define CTX_PDP2_LDW                 0x2a
> +#define CTX_PDP1_UDW                 0x2c
> +#define CTX_PDP1_LDW                 0x2e
> +#define CTX_PDP0_UDW                 0x30
> +#define CTX_PDP0_LDW                 0x32
> +#define CTX_LRI_HEADER_2             0x41
> +#define CTX_R_PWR_CLK_STATE          0x42
> +#define CTX_GPGPU_CSR_BASE_ADDRESS   0x44
> +
> +#define CTX_REG(reg_state, pos, reg, val) do { \
> +     (reg_state)[(pos)+0] = i915_mmio_reg_offset(reg); \
> +     (reg_state)[(pos)+1] = (val); \
> +} while (0)
> +
> +#define ASSIGN_CTX_PDP(ppgtt, reg_state, n) do {             \
> +     const u64 _addr = i915_page_dir_dma_addr((ppgtt), (n)); \
> +     reg_state[CTX_PDP ## n ## _UDW+1] = upper_32_bits(_addr); \
> +     reg_state[CTX_PDP ## n ## _LDW+1] = lower_32_bits(_addr); \
> +} while (0)
> +
> +#define ASSIGN_CTX_PML4(ppgtt, reg_state) do { \
> +     reg_state[CTX_PDP0_UDW + 1] = upper_32_bits(px_dma(&ppgtt->pml4)); \
> +     reg_state[CTX_PDP0_LDW + 1] = lower_32_bits(px_dma(&ppgtt->pml4)); \
> +} while (0)
> +
> +#define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT     0x17
> +#define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT     0x26
> +#define GEN10_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT    0x19
> +
> +#endif /* _INTEL_LRC_REG_H_ */
> -- 
> 2.15.1
> 
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