Hi Rodrigo,
On Wed, Feb 07, 2018 at 04:37:33PM -0800, Rodrigo Vivi wrote:
> Rodrigo Vivi <[email protected]> writes:
>
> > Starting on CNL, we need to enable Audio Pin Buffer.
>
> Ok... I forgot to include ICL on this now.
> But first let's check if this is working on CNL and later I sent a v5.
>
This does not work on CNL. With this, the vendor id response is
0xffffffff.
I am not sure though why/how the below works fine:
(commented out disable sequence)
if (IS_CANNONLAKE(dev_priv)) {
tmp = I915_READ(AUDIO_PIN_BUF_CTL);
if (enable)
tmp |= AUDIO_PIN_BUF_ENABLE;
/*
else
tmp &= ~AUDIO_PIN_BUF_ENABLE;
*/
I915_WRITE(AUDIO_PIN_BUF_CTL, tmp);
> On top of that for CNL and ICL audio needs to know when we are
> switching cdclk. But for this work I'd like to hear from audio
> if they need a new hook for notification or what.
>
> And I will wait the work on audio start first before attempt
> to implement any new hook on our side.
>
> Thanks,
> Rodrigo.
>
> >
> > v4: Throw the exclusive hook and everything else away
> > and add set/unset bit along with codec awake.
> >
> > Based on few spec links that I was checking recently
> > I now believe that on CNL we also need to keep the codec
> > awake chicken bit along with PG2 enable and also add
> > this extra pin buffer enable.
> >
> > BSpec: 18057
> > BSpec: 21352
> > BSpec: 19621
> >
> > Cc: Jani Nikula <[email protected]>
> > Cc: Sanyog Kale <[email protected]>
> > Cc: Guneshwor Singh <[email protected]>
> > Cc: Abhay Kumar <[email protected]>
> > Signed-off-by: Rodrigo Vivi <[email protected]>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 3 +++
> > drivers/gpu/drm/i915/intel_audio.c | 11 ++++++++++-
> > 2 files changed, 13 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 65ba10ad1fe5..768e784ea241 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -8424,6 +8424,9 @@ enum {
> > #define HSW_AUD_CHICKENBIT _MMIO(0x65f10)
> > #define SKL_AUD_CODEC_WAKE_SIGNAL (1 << 15)
> >
> > +#define AUDIO_PIN_BUF_CTL _MMIO(0x48414)
> > +#define AUDIO_PIN_BUF_ENABLE (1 << 31)
> > +
> > /* HSW Power Wells */
> > #define _HSW_PWR_WELL_CTL1 0x45400
> > #define _HSW_PWR_WELL_CTL2 0x45404
> > diff --git a/drivers/gpu/drm/i915/intel_audio.c
> > b/drivers/gpu/drm/i915/intel_audio.c
> > index 522d54fecb53..34f18322c9bd 100644
> > --- a/drivers/gpu/drm/i915/intel_audio.c
> > +++ b/drivers/gpu/drm/i915/intel_audio.c
> > @@ -729,11 +729,20 @@ static void
> > i915_audio_component_codec_wake_override(struct device *kdev,
> > struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
> > u32 tmp;
> >
> > - if (!IS_GEN9_BC(dev_priv))
> > + if (!IS_GEN9_BC(dev_priv) && !IS_CANNONLAKE(dev_priv))
> > return;
> >
> > i915_audio_component_get_power(kdev);
> >
> > + if (IS_CANNONLAKE(dev_priv)) {
> > + tmp = I915_READ(AUDIO_PIN_BUF_CTL);
> > + if (enable)
> > + tmp |= AUDIO_PIN_BUF_ENABLE;
> > + else
> > + tmp &= ~AUDIO_PIN_BUF_ENABLE;
> > + I915_WRITE(AUDIO_PIN_BUF_CTL, tmp);
> > + }
> > +
> > /*
> > * Enable/disable generating the codec wake signal, overriding the
> > * internal logic to generate the codec wake to controller.
> > --
> > 2.13.6
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > [email protected]
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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