On Wed, Feb 07, 2018 at 03:13:36PM +0000, Chris Wilson wrote:
> Since we depending upon the runtime powermanagement to providing timing
> information in lieu of HW counters when the device is asleep, we can
> only provide the rc6 PMU event when CONFIG_PM is enabled.
>
> Fixes: 1fe699e30113 ("drm/i915/pmu: Fix sleep under atomic in RC6 readout")
> Signed-off-by: Chris Wilson <[email protected]>
> Cc: Tvrtko Ursulin <[email protected]>
Hm, doesn't the counter stop only during system/runtime suspend? If so
those wouldn't be available w/o CONFIG_PM, hence we wouldn't have a
problem?
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index bfc402d47609..6b35467b3aeb 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -344,10 +344,12 @@ config_status(struct drm_i915_private *i915, u64 config)
> break;
> case I915_PMU_INTERRUPTS:
> break;
> +#if IS_ENABLED(CONFIG_PM)
> case I915_PMU_RC6_RESIDENCY:
> if (!HAS_RC6(i915))
> return -ENODEV;
> break;
> +#endif
> default:
> return -ENOENT;
> }
> @@ -415,6 +417,7 @@ static int i915_pmu_event_init(struct perf_event *event)
> return 0;
> }
>
> +#if IS_ENABLED(CONFIG_PM)
> static u64 get_rc6(struct drm_i915_private *i915, bool locked)
> {
> unsigned long flags;
> @@ -488,6 +491,7 @@ static u64 get_rc6(struct drm_i915_private *i915, bool
> locked)
>
> return val;
> }
> +#endif
>
> static u64 __i915_pmu_event_read(struct perf_event *event, bool locked)
> {
> @@ -526,9 +530,11 @@ static u64 __i915_pmu_event_read(struct perf_event
> *event, bool locked)
> case I915_PMU_INTERRUPTS:
> val = count_interrupts(i915);
> break;
> +#if IS_ENABLED(CONFIG_PM)
> case I915_PMU_RC6_RESIDENCY:
> val = get_rc6(i915, locked);
> break;
> +#endif
> }
> }
>
> @@ -799,7 +805,9 @@ create_event_attributes(struct drm_i915_private *i915)
> __event(I915_PMU_ACTUAL_FREQUENCY, "actual-frequency", "MHz"),
> __event(I915_PMU_REQUESTED_FREQUENCY, "requested-frequency",
> "MHz"),
> __event(I915_PMU_INTERRUPTS, "interrupts", NULL),
> +#if IS_ENABLED(CONFIG_PM)
> __event(I915_PMU_RC6_RESIDENCY, "rc6-residency", "ns"),
> +#endif
> };
> static const struct {
> enum drm_i915_pmu_engine_sample sample;
> --
> 2.16.1
>
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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