On Tue, Oct 23, 2012 at 9:29 PM, Paulo Zanoni <przan...@gmail.com> wrote: > From: Paulo Zanoni <paulo.r.zan...@intel.com> > > This register appeared in Haswell. It does not have an EDP version > because the EDP transcoder is always tied to the DDIA clock. Notice > that if we call PIPE_CLK_SEL(pipe) when pipe is PIPE_A and transcoder > is TRANSCODER_EDP we might introduce a bug, that's why this is a > transcoder register even though it does not have an EDP version. > > Even though Haswell names this register PIPE_CLK_SEL, it will be > renamed to TRANS_CLK_SEL in the future, so let's just start using the > real name that makes more sense and avoids misusage. > > Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Reviewed-by: Damien Lespiau <damien.lesp...@intel.com> -- Damien _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
