On Thu, Apr 19, 2018 at 06:51:09PM +0300, Imre Deak wrote: > The DMC FW specific part of display WA#1183 is supposed to be enabled > whenever enabling DC5 or DC6, so move it to the DC6 enable function > from the DC6 disable function.
That does make more sense :) Reviewed-by: Ville Syrjälä <[email protected]> > > I noticed this after Daniel's patch to remove the unused > skl_disable_dc6() function. > > Fixes: 53421c2fe99c ("drm/i915: Apply Display WA #1183 on skl, kbl, and cfl") > Cc: Lucas De Marchi <[email protected]> > Cc: Rodrigo Vivi <[email protected]> > Cc: Ville Syrjälä <[email protected]> > Cc: Daniel Vetter <[email protected]> > Cc: <[email protected]> > Signed-off-by: Imre Deak <[email protected]> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 53ea564f971e..66de4b2dc8b7 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -641,19 +641,18 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) > > DRM_DEBUG_KMS("Enabling DC6\n"); > > - gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); > + /* Wa Display #1183: skl,kbl,cfl */ > + if (IS_GEN9_BC(dev_priv)) > + I915_WRITE(GEN8_CHICKEN_DCPR_1, I915_READ(GEN8_CHICKEN_DCPR_1) | > + SKL_SELECT_ALTERNATE_DC_EXIT); > > + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); > } > > void skl_disable_dc6(struct drm_i915_private *dev_priv) > { > DRM_DEBUG_KMS("Disabling DC6\n"); > > - /* Wa Display #1183: skl,kbl,cfl */ > - if (IS_GEN9_BC(dev_priv)) > - I915_WRITE(GEN8_CHICKEN_DCPR_1, I915_READ(GEN8_CHICKEN_DCPR_1) | > - SKL_SELECT_ALTERNATE_DC_EXIT); > - > gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); > } > > -- > 2.13.2 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
