Dear Sir:
My name is wenjie zhou.I come from Wuhan China. Now I am writing
HD3000(sandybridge) driver on vxWorks.But,there are some problems confusing me
for a long time.Please help me!Thank you!
My problme is:When I use the blitter engine to realize filling the color
to the rectangle,CP will stop in the first instruction(BR00).In the
progrm,there are six instuction:br00,br13,br14,br09,br16 and MI_NOP.After
allowing the CP to excute ,the Mode Register's bit9(Rings Idle) is set to 0.It
means parser is not idle or ring arbiter is not idle.And the Error Status
Register (ESR)'s bit0 will be set to 1. It means instruction error.The
RING_BUFFER_HEADER register's value is 0x4.So I think the problem happened when
the CP excuted the br00 instruction. When the CP excutes flush command, it
works very well. I wonder why it happens? Is it relate with cache?PS:this
ringbuffer program works very well on the ironlake platform.
Thank you!
Sincerely yours,
Wenjie Zhou
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
