>-----Original Message-----
>From: dri-devel [mailto:[email protected]] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:27 PM
>To: [email protected]; [email protected];
>[email protected]; [email protected]; [email protected];
>[email protected]; Winkler, Tomas <[email protected]>;
>Usyskin, Alexander <[email protected]>
>Cc: Vivi, Rodrigo <[email protected]>
>Subject: [PATCH v3 07/40] linux/mei: Header for mei_hdcp driver interface
>
>Data structures and Enum for the I915-MEI_HDCP interface are defined at
><linux/mei_hdcp.h>
>
>v2:
> Rebased.
>v3:
> mei_cl_device is removed from mei_hdcp_data [Tomas]
>
>Signed-off-by: Ramalingam C <[email protected]>
>---
> include/linux/mei_hdcp.h | 70
>++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 70 insertions(+)
>
>diff --git a/include/linux/mei_hdcp.h b/include/linux/mei_hdcp.h index
>3b46bebde718..634c1a5bdf1e 100644
>--- a/include/linux/mei_hdcp.h
>+++ b/include/linux/mei_hdcp.h
>@@ -27,11 +27,81 @@
> #ifndef _LINUX_MEI_HDCP_H
> #define _LINUX_MEI_HDCP_H
>
>+#include <linux/mei_cl_bus.h>
>+
> enum mei_cldev_state {
> MEI_CLDEV_DISABLED,
> MEI_CLDEV_ENABLED
> };
>
>+/*
>+ * Enumeration of the physical DDI available on the platform */ enum
>+hdcp_physical_port {
>+ INVALID_PORT = 0x00, /* Not a valid port */
>+
>+ DDI_RANGE_BEGIN = 0x01, /* Beginning of the valid DDI port range
>*/
>+ DDI_B = 0x01, /* Port DDI B */
>+ DDI_C = 0x02, /* Port DDI C */
>+ DDI_D = 0x03, /* Port DDI D */
>+ DDI_E = 0x04, /* Port DDI E */
>+ DDI_F = 0x05, /* Port DDI F */
>+ DDI_A = 0x07, /* Port DDI A */
Why A is made as 0x7. In I915, enum port defines A as 0. Any special reason to
deviate from that ?
>+ DDI_RANGE_END = DDI_A,/* End of the valid DDI port range */
>+};
>+
>+/* The types of HDCP 2.2 ports supported */ enum
>+hdcp_integrated_port_type {
>+ HDCP_INVALID_TYPE = 0x00,
>+
>+ /* HDCP 2.x ports that are integrated into Intel HW */
>+ INTEGRATED = 0x01,
>+
>+ /* HDCP2.2 discrete wired Tx port with LSPCON (HDMI 2.0) solution */
>+ LSPCON = 0x02,
>+
>+ /* HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3) solution */
>+ CPDP = 0x03,
>+};
>+
>+/**
Drop an extra *
>+ * wired_protocol: Supported integrated wired HDCP protocol.
>+ * Based on this value, Minor differenceneeded between wired
"Add space after differences"
>+specifications
>+ * are handled.
>+ */
>+enum hdcp_protocol {
>+ HDCP_PROTOCOL_INVALID,
>+ HDCP_PROTOCOL_HDMI,
>+ HDCP_PROTOCOL_DP
>+};
>+
>+/**
>+ * mei_hdcp_data: Input data to the mei_hdcp APIs.
>+ */
>+struct mei_hdcp_data {
>+ enum hdcp_physical_port port;
>+ enum hdcp_integrated_port_type port_type;
>+ enum hdcp_protocol protocol;
>+
>+ /*
>+ * No of streams transmitted on a port.
>+ * In case of HDMI & DP SST, single stream will be
>+ * transmitted on a port.
>+ */
>+ uint16_t k;
>+
>+ /*
>+ * Count of RepeaterAuth_Stream_Manage msg propagated.
>+ * Initialized to 0 on AKE_INIT. Incremented after every successful
>+ * transmission of RepeaterAuth_Stream_Manage message. When it rolls
>+ * over re-Auth has to be triggered.
>+ */
>+ uint32_t seq_num_m;
>+
>+ /* k(No of Streams per port) x structure of wired_streamid_type */
>+ struct hdcp2_streamid_type *streams;
>+};
>+
> #ifdef CONFIG_INTEL_MEI_HDCP
> int mei_cldev_register_notify(struct notifier_block *nb); int
>mei_cldev_unregister_notify(struct notifier_block *nb);
>--
>2.7.4
>
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