the patch looks fine to me.
 
On Mon, 2018-05-21 at 17:25 -0700, Paulo Zanoni wrote:
> Just like DP, HDMI needs to implement these flows. The side effect is
> that HDMI is now going to rely on the ISR bits, just like DP.
> 
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
 
> Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
> [Rodrigo: non-trivial rebase.]
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 53ac8bb85218..75f02a0e7d39 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1893,21 +1893,26 @@ intel_hdmi_set_edid(struct drm_connector
> *connector)
>  static enum drm_connector_status
>  intel_hdmi_detect(struct drm_connector *connector, bool force)
>  {
> -     enum drm_connector_status status;
> +     enum drm_connector_status status =
> connector_status_disconnected;
>       struct drm_i915_private *dev_priv = to_i915(connector->dev);
> +     struct intel_hdmi *intel_hdmi =
> intel_attached_hdmi(connector);
> +     struct intel_encoder *encoder =
> &hdmi_to_dig_port(intel_hdmi)->base;
>  
>       DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
>                     connector->base.id, connector->name);
>  
>       intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
>  
> +     if (IS_ICELAKE(dev_priv) &&
> +         !intel_digital_port_connected(encoder))
> +             goto out;
> +
>       intel_hdmi_unset_edid(connector);
>  
>       if (intel_hdmi_set_edid(connector))
>               status = connector_status_connected;
> -     else
> -             status = connector_status_disconnected;
>  
> +out:
>       intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS);
>  
>       return status;
-- 
Mika Kahola - Intel OTC

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to