Noticed while strolling through docs. Might make a few dual-link dvi users happy(ier).
v2: Remove the unrelated debug hacks in intel_display.c v3: Preserve register contexts to not upset fastboot or the modeset hw state checker. v4: Actually enable it in the irq handler/postinstall functions, too Signed-off-by: Daniel Vetter <[email protected]> --- drivers/gpu/drm/i915/i915_irq.c | 3 +++ drivers/gpu/drm/i915/i915_reg.h | 6 ++++-- drivers/gpu/drm/i915/intel_sdvo.c | 14 +++++++++++++- 3 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index d02e022..e9b9460 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1910,6 +1910,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev) SDE_PORTB_HOTPLUG_CPT | SDE_PORTC_HOTPLUG_CPT | SDE_PORTD_HOTPLUG_CPT | + SDE_SDVOB_HOTPLUG_CPT | SDE_GMBUS_CPT | SDE_AUX_MASK_CPT); } else { @@ -1917,6 +1918,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev) SDE_PORTB_HOTPLUG | SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG | + SDE_SDVOB_HOTPLUG | SDE_GMBUS | SDE_AUX_MASK); } @@ -1979,6 +1981,7 @@ static int ivybridge_irq_postinstall(struct drm_device *dev) SDE_PORTB_HOTPLUG_CPT | SDE_PORTC_HOTPLUG_CPT | SDE_PORTD_HOTPLUG_CPT | + SDE_SDVOB_HOTPLUG_CPT | SDE_GMBUS_CPT | SDE_AUX_MASK_CPT); dev_priv->pch_irq_mask = ~hotplug_mask; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f2a5ea6..d8162f8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1673,7 +1673,7 @@ #define SDVO_ENABLE (1 << 31) #define SDVO_PIPE_B_SELECT (1 << 30) #define SDVO_STALL_SELECT (1 << 29) -#define SDVO_INTERRUPT_ENABLE (1 << 26) +#define SDVO_INTERRUPT_ENABLE_PCH (1 << 23) /** * 915G/GM SDVO pixel multiplier. * @@ -3498,7 +3498,7 @@ #define SDE_PORTC_HOTPLUG (1 << 9) #define SDE_PORTB_HOTPLUG (1 << 8) #define SDE_SDVOB_HOTPLUG (1 << 6) -#define SDE_HOTPLUG_MASK (0xf << 8) +#define SDE_HOTPLUG_MASK ((0xf << 8) | SDE_SDVOB_HOTPLUG) #define SDE_TRANSB_CRC_DONE (1 << 5) #define SDE_TRANSB_CRC_ERR (1 << 4) #define SDE_TRANSB_FIFO_UNDER (1 << 3) @@ -3521,7 +3521,9 @@ #define SDE_PORTC_HOTPLUG_CPT (1 << 22) #define SDE_PORTB_HOTPLUG_CPT (1 << 21) #define SDE_CRT_HOTPLUG_CPT (1 << 19) +#define SDE_SDVOB_HOTPLUG_CPT (1 << 18) #define SDE_HOTPLUG_MASK_CPT (SDE_CRT_HOTPLUG_CPT | \ + SDE_SDVOB_HOTPLUG_CPT | \ SDE_PORTD_HOTPLUG_CPT | \ SDE_PORTC_HOTPLUG_CPT | \ SDE_PORTB_HOTPLUG_CPT) diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index c275bf0..2c1543b 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -1085,6 +1085,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, if (!mode) return; + /* Preserve the PCH interrupt enable bit. */ + sdvox = I915_READ(intel_sdvo->sdvo_reg) & SDVO_INTERRUPT_ENABLE_PCH; + /* First, set the input mapping for the first input to our controlled * output. This is only correct if we're a single-input device, in * which case the first input is the output from the appropriate SDVO @@ -2775,9 +2778,18 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) /* Only enable the hotplug irq if we need it, to work around noisy * hotplug lines. */ - if (intel_sdvo->hotplug_active) + if (intel_sdvo->hotplug_active) { dev_priv->hotplug_supported_mask |= hotplug_mask; + if (HAS_PCH_SPLIT(dev)) { + u32 temp; + + temp = I915_READ(intel_sdvo->sdvo_reg); + temp &= SDVO_INTERRUPT_ENABLE_PCH; + intel_sdvo_write_sdvox(intel_sdvo, temp); + } + } + intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); /* Set the input timing to the screen. Assume always input 0. */ -- 1.7.11.7 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
