On Wed, Aug 22, 2018 at 02:26:02PM +0300, Imre Deak wrote: > For S0ix we want to deinit power domains (and so deactivate the DMC > firmware) exactly when the platform supports the DC9 state. To reach > S0ix we need DC9 on these platforms (for which the DMC FW needs to be > deactivated) while to reach S0ix on the rest of the DMC platforms we > need DC6 (which needs the DMC FW to stay active). > > Simplify the condition accordingly so it will be automatically > correct for upcoming DC9 platforms like ICL. > > Cc: Lucas De Marchi <[email protected]> > Cc: Michel Thierry <[email protected]> > Cc: Ville Syrjälä <[email protected]> > Cc: Rodrigo Vivi <[email protected]> > Cc: Paulo Zanoni <[email protected]> > Cc: Chris Wilson <[email protected]> > Signed-off-by: Imre Deak <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 13 +++++++------ > 1 file changed, 7 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index ff3fd8dbd2b4..1b10b7041513 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -3848,13 +3848,14 @@ void intel_power_domains_suspend(struct > drm_i915_private *dev_priv, > intel_display_power_put(dev_priv, POWER_DOMAIN_INIT); > > /* > - * In case of firmware assisted context save/restore don't manually > - * deinit the power domains. This also means the CSR/DMC firmware will > - * stay active, it will power down any HW resources as required and > - * also enable deeper system power states that would be blocked if the > - * firmware was inactive. > + * In case of suspend-to-idle (aka S0ix) on a DMC platform without DC9 > + * support don't manually deinit the power domains. This also means the > + * CSR/DMC firmware will stay active, it will power down any HW > + * resources as required and also enable deeper system power states > + * that would be blocked if the firmware was inactive. > */ > - if (!IS_GEN9_LP(dev_priv) && suspend_mode == I915_DRM_SUSPEND_IDLE && > + if (!(dev_priv->csr.allowed_dc_mask & DC_STATE_EN_DC9) && > + suspend_mode == I915_DRM_SUSPEND_IDLE && > dev_priv->csr.dmc_payload != NULL) { > intel_power_domains_verify_state(dev_priv); > return; > -- > 2.13.2 -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
