Op 24-08-18 om 11:32 schreef Mahesh Kumar:
> IPC may cause underflows if not used with dual channel symmetric
> memory configuration. Disable IPC for non symmetric configurations in
> affected platforms.
> Display WA #1141
>
> Changes Since V1:
>  - Re-arrange the code.
>  - update wrapper to return if memory is symmetric (Rodrigo)
>
> Signed-off-by: Mahesh Kumar <[email protected]>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 27 ++++++++++++++++++++++-----
>  drivers/gpu/drm/i915/i915_drv.h |  1 +
>  drivers/gpu/drm/i915/intel_pm.c |  5 +++++
>  3 files changed, 28 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 2bc74c01a0e5..61d756ae7bf0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1154,21 +1154,32 @@ skl_dram_get_channel_info(struct dram_channel_info 
> *ch, u32 val)
>       return 0;
>  }
>  
> +static bool
> +intel_is_dram_symmetric(u32 val_ch0, u32 val_ch1,
> +                     struct dram_channel_info *ch0)
> +{
> +     return (val_ch0 == val_ch1 &&
> +             (ch0->s_info.size == 0 ||
> +              (ch0->l_info.size == ch0->s_info.size &&
> +               ch0->l_info.width == ch0->s_info.width &&
> +               ch0->l_info.rank == ch0->s_info.rank)));
> +}
> +
>  static int
>  skl_dram_get_channels_info(struct drm_i915_private *dev_priv)
>  {
>       struct dram_info *dram_info = &dev_priv->dram_info;
>       struct dram_channel_info ch0, ch1;
> -     u32 val;
> +     u32 val_ch0, val_ch1;
>       int ret;
>  
> -     val = I915_READ(SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> -     ret = skl_dram_get_channel_info(&ch0, val);
> +     val_ch0 = I915_READ(SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> +     ret = skl_dram_get_channel_info(&ch0, val_ch0);
>       if (ret == 0)
>               dram_info->num_channels++;
>  
> -     val = I915_READ(SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> -     ret = skl_dram_get_channel_info(&ch1, val);
> +     val_ch1 = I915_READ(SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> +     ret = skl_dram_get_channel_info(&ch1, val_ch1);
>       if (ret == 0)
>               dram_info->num_channels++;
>  
> @@ -1198,6 +1209,12 @@ skl_dram_get_channels_info(struct drm_i915_private 
> *dev_priv)
>       if (ch0.is_16gb_dimm || ch1.is_16gb_dimm)
>               dram_info->is_16gb_dimm = true;
>  
> +     dev_priv->dram_info.symmetric_memory = intel_is_dram_symmetric(val_ch0,
> +                                                                    val_ch1,
> +                                                                    &ch0);
> +
> +     DRM_DEBUG_KMS("memory configuration is %sSymmetric memory\n",
> +                   dev_priv->dram_info.symmetric_memory ? "" : "not ");
>       return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6c432684c721..e7faa046f78a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1955,6 +1955,7 @@ struct drm_i915_private {
>                       I915_DRAM_RANK_DUAL
>               } rank;
>               u32 bandwidth_kbps;
> +             bool symmetric_memory;
>       } dram_info;
>  
>       struct i915_runtime_pm runtime_pm;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 77970e38d939..c27646fb4cec 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6124,6 +6124,11 @@ void intel_enable_ipc(struct drm_i915_private 
> *dev_priv)
>       if (IS_SKYLAKE(dev_priv))
>               dev_priv->ipc_enabled = false;
>  
> +     /* Display WA #1141: SKL:all KBL:all CFL */
> +     if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) &&
> +         !dev_priv->dram_info.symmetric_memory)
> +             dev_priv->ipc_enabled = false;
> +
>       val = I915_READ(DISP_ARB_CTL2);
>  
>       if (dev_priv->ipc_enabled)

Patch series looks good with minor nit in 3/5 fixed.


Reviewed-by: Maarten Lankhorst <[email protected]>

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