Hi,

One final unreviewed patch on this series. Hopefully uncontroversial enough for a quick review?

Thanks,

Tvrtko

On 17/09/2018 12:30, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin <tvrtko.ursu...@intel.com>

When OA is active we want to lock the powergating configuration, but on
Icelake, users like the media stack will have issues if we lock to the
full device configuration.

Instead lock to a subset of (sub)slices which are currently a known
working configuration for all users.

v2:
  * Fix commit message spelling.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwer...@intel.com>
---
  drivers/gpu/drm/i915/intel_lrc.c | 25 ++++++++++++++++++++-----
  1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b5603e977a3f..cded1f1d9ec2 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2521,13 +2521,28 @@ u32 gen8_make_rpcs(struct drm_i915_private *i915, 
struct intel_sseu *req_sseu)
/*
         * If i915/perf is active, we want a stable powergating configuration
-        * on the system. The most natural configuration to take in that case
-        * is the default (i.e maximum the hardware can do).
+        * on the system.
+        *
+        * We could choose full enablement, but on ICL we know there are use
+        * cases which disable slices for functional, apart for performance
+        * reasons. So in this case we select a known stable subset.
         */
-       if (unlikely(i915->perf.oa.exclusive_stream))
-               ctx_sseu = intel_device_default_sseu(i915);
-       else
+       if (!i915->perf.oa.exclusive_stream) {
                ctx_sseu = *req_sseu;
+       } else {
+               ctx_sseu = intel_device_default_sseu(i915);
+
+               if (IS_GEN11(i915)) {
+                       /*
+                        * We only need subslice count so it doesn't matter
+                        * which ones we select - just turn of low bits in the
+                        * amount of half of all available subslices per slice.
+                        */
+                       ctx_sseu.subslice_mask =
+                               ~(~0 << (hweight8(ctx_sseu.subslice_mask) / 2));
+                       ctx_sseu.slice_mask = 0x1;
+               }
+       }
slices = hweight8(ctx_sseu.slice_mask);
        subslices = hweight8(ctx_sseu.subslice_mask);

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