From: Ville Syrjälä <[email protected]> Reduce the differences between the platforms by using the spr/cur watermark latency values on gmch platforms as well. We'll also print the wm latencies the same way as we do for ilk+.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/i915_debugfs.c | 4 +- drivers/gpu/drm/i915/intel_pm.c | 63 ++++++++++++++++++----------- 2 files changed, 41 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 9e0cb995801f..35b4c49c9bca 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3873,7 +3873,7 @@ static int spr_wm_latency_open(struct inode *inode, struct file *file) { struct drm_i915_private *dev_priv = inode->i_private; - if (HAS_GMCH_DISPLAY(dev_priv)) + if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) return -ENODEV; return single_open(file, spr_wm_latency_show, dev_priv); @@ -3883,7 +3883,7 @@ static int cur_wm_latency_open(struct inode *inode, struct file *file) { struct drm_i915_private *dev_priv = inode->i_private; - if (HAS_GMCH_DISPLAY(dev_priv)) + if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) return -ENODEV; return single_open(file, cur_wm_latency_show, dev_priv); diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f871a6f152c3..fe522ceae97a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -801,6 +801,27 @@ static int intel_wm_num_levels(struct drm_i915_private *dev_priv) return dev_priv->wm.max_level + 1; } +static void intel_print_wm_latency(struct drm_i915_private *dev_priv, + const char *name, + const uint16_t wm[8]) +{ + int level, max_level = ilk_wm_max_level(dev_priv); + + for (level = 0; level <= max_level; level++) { + unsigned int latency = wm[level]; + + if (latency == 0) { + DRM_DEBUG_KMS("%s WM%d latency not provided\n", + name, level); + continue; + } + + DRM_DEBUG_KMS("%s WM%d latency %u (%u.%u usec)\n", + name, level, wm[level], + latency / 10, latency % 10); + } +} + static int intel_plane_wm_latency(struct intel_plane *plane, int level) { @@ -809,9 +830,6 @@ static int intel_plane_wm_latency(struct intel_plane *plane, if (INTEL_GEN(dev_priv) >= 9) return dev_priv->wm.skl_latency[level]; - if (HAS_GMCH_DISPLAY(dev_priv)) - return dev_priv->wm.pri_latency[level]; - switch (plane->id) { case PLANE_PRIMARY: return dev_priv->wm.pri_latency[level]; @@ -1066,6 +1084,15 @@ static void g4x_setup_wm_latency(struct drm_i915_private *dev_priv) dev_priv->wm.pri_latency[G4X_WM_LEVEL_HPLL] = 350; dev_priv->wm.max_level = G4X_WM_LEVEL_HPLL; + + memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency, + sizeof(dev_priv->wm.pri_latency)); + memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency, + sizeof(dev_priv->wm.pri_latency)); + + intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); + intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); + intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); } static int g4x_plane_fifo_size(enum plane_id plane_id, int level) @@ -1618,6 +1645,15 @@ static void vlv_setup_wm_latency(struct drm_i915_private *dev_priv) dev_priv->wm.max_level = VLV_WM_LEVEL_DDR_DVFS; } + + memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency, + sizeof(dev_priv->wm.pri_latency)); + memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency, + sizeof(dev_priv->wm.pri_latency)); + + intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); + intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); + intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); } static uint16_t vlv_compute_wm_level(const struct intel_crtc_state *crtc_state, @@ -2954,27 +2990,6 @@ int ilk_wm_max_level(const struct drm_i915_private *dev_priv) return 2; } -static void intel_print_wm_latency(struct drm_i915_private *dev_priv, - const char *name, - const uint16_t wm[8]) -{ - int level, max_level = ilk_wm_max_level(dev_priv); - - for (level = 0; level <= max_level; level++) { - unsigned int latency = wm[level]; - - if (latency == 0) { - DRM_DEBUG_KMS("%s WM%d latency not provided\n", - name, level); - continue; - } - - DRM_DEBUG_KMS("%s WM%d latency %u (%u.%u usec)\n", - name, level, wm[level], - latency / 10, latency % 10); - } -} - static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv, uint16_t wm[5], uint16_t min) { -- 2.18.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
