On Thu, 2018-10-11 at 15:57 -0700, Paulo Zanoni wrote:
> From: Mahesh Kumar <[email protected]>
> 
> Enable SAGV for ICL platform.
> 
> Cc: Gwan-gyeong Mun <[email protected]>
> Reviewed-by: James Ausmus <[email protected]>
> Reviewed-by: Paulo Zanoni <[email protected]>
> Signed-off-by: Mahesh Kumar <[email protected]>
> Signed-off-by: Paulo Zanoni <[email protected]>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> I had previously blocked this patch in January:
>   https://patchwork.freedesktop.org/patch/200285/
> 
> But since then the spec was fixed and now the requirements listed for
> sagv on ICL are the same as for the previous platforms, so the patch
> is now valid. Thanks to Gwan-gyeong Mun for re-checking that.
> 
As Paulo mentioned, an SAGV between GEN9 and GEN11 uses same algorithm
with different SAGV block time on the each platforms.
This patch looks to be fixing SAGV related FIFO underrun issues of ICL.

[test manners]
Add an external monitor (I tested with a monitor which has usb-c type
connector (it uses dp-alt mode).) (additional explains: edp + usb-c
type monitor were used.) 
and check dmesg log which said a disabling SAGV and an occurrence of
FIFO underrun.

[test results]
the dmesg log showed below log
...
[drm:intel_enable_sagv [i915]] Enabling the SAGV
...
[drm:intel_disable_sagv [i915]] Disabling the SAGV
...
and when I tested I didn't meet FIFO underrun message from dmesg.


Tested-by: Gwan-gyeong Mun <[email protected]>

Best regards
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 7a53079f3196..b9febe1d2f6b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3613,7 +3613,7 @@ static bool
>  intel_has_sagv(struct drm_i915_private *dev_priv)
>  {
>       if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
> -         IS_CANNONLAKE(dev_priv))
> +         IS_CANNONLAKE(dev_priv) || IS_ICELAKE(dev_priv))
>               return true;
>  
>       if (IS_SKYLAKE(dev_priv) &&
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