From: Ville Syrjälä <[email protected]> GPIO/GMBUS registers must be offset on VLV, so simply adjust gpio_mmio_base to include the correct offset.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/intel_i2c.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 7f09041..acf8aec 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -515,6 +515,8 @@ int intel_setup_gmbus(struct drm_device *dev) if (HAS_PCH_SPLIT(dev)) dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA; + else if (IS_VALLEYVIEW(dev)) + dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE; else dev_priv->gpio_mmio_base = 0; -- 1.7.12.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
