On Tue, 27 Nov 2018, Vandita Kulkarni <vandita.kulka...@intel.com> wrote:
> From: Madhav Chauhan <madhav.chau...@intel.com>
>
> This patch calculates various DPLL dividers and
> parameters for DSI encoder and adjust AFE clock
> for DSI. For DSI, 8x clock is AFE clock.
>
> v2: Extend haswell_crtc_compute_clock() for Gen11 DSI
>
> v3: Rebase
>
> v4: use port clock instead of bitrate.
>
> v5: Reabse and remove divide by 5
>
> Signed-off-by: Madhav Chauhan <madhav.chau...@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulka...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 +++-
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++---
> 2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 27bdf91..1318faf 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9303,10 +9303,12 @@ void hsw_disable_pc8(struct drm_i915_private
> *dev_priv)
> static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state)
> {
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> struct intel_atomic_state *state =
> to_intel_atomic_state(crtc_state->base.state);
>
> - if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)) {
> + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI) ||
> + IS_ICELAKE(dev_priv)) {
> struct intel_encoder *encoder =
> intel_get_crtc_new_encoder(state, crtc_state);
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 901e150..e3cb0db 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2523,10 +2523,10 @@ static bool icl_calc_dpll_state(struct
> intel_crtc_state *crtc_state,
>
> if (intel_port_is_tc(dev_priv, encoder->port))
> ret = icl_calc_tbt_pll(dev_priv, clock, &pll_params);
> - else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> - ret = cnl_ddi_calculate_wrpll(clock, dev_priv, &pll_params);
> - else
> + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))
I think this breaks EDP and DP MST. Probably just safest to add
|| intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI)
alongside the HDMI branch.
BR,
Jani.
> ret = icl_calc_dp_combo_pll(dev_priv, clock, &pll_params);
> + else
> + ret = cnl_ddi_calculate_wrpll(clock, dev_priv, &pll_params);
>
> if (!ret)
> return false;
--
Jani Nikula, Intel Open Source Graphics Center
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