On Wed, Nov 28, 2018 at 03:58:19PM +0200, Mika Kuoppala wrote: > Chris Wilson <[email protected]> writes: > > > Mark A0 as the one and only pre-production variant of Kabylake and > > remove its couple of workarounds, consigning them to the annals of > > history. > > > > Signed-off-by: Chris Wilson <[email protected]> > > Cc: Joonas Lahtinen <[email protected]> > > Cc: Jani Nikula <[email protected]> > > Cc: Rodrigo Vivi <[email protected]> > > Cc: Mika Kuoppala <[email protected]> > > My two patches are the same so in favour of compactness: :) > > Reviewed-by: Mika Kuoppala <[email protected]>
Acked-by: Rodrigo Vivi <[email protected]> > > > --- > > drivers/gpu/drm/i915/i915_drv.c | 1 + > > drivers/gpu/drm/i915/intel_lrc.c | 12 ------------ > > drivers/gpu/drm/i915/intel_workarounds.c | 5 ----- > > 3 files changed, 1 insertion(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > > b/drivers/gpu/drm/i915/i915_drv.c > > index b1d23c73c147..e39016713464 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -868,6 +868,7 @@ static void intel_detect_preproduction_hw(struct > > drm_i915_private *dev_priv) > > pre |= IS_HSW_EARLY_SDV(dev_priv); > > pre |= IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0); > > pre |= IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST); > > + pre |= IS_KBL_REVID(dev_priv, 0, KBL_REVID_A0); > > > > if (pre) { > > DRM_ERROR("This is a pre-production stepping. " > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c > > b/drivers/gpu/drm/i915/intel_lrc.c > > index 08fd9b12e4d7..11f4e6148557 100644 > > --- a/drivers/gpu/drm/i915/intel_lrc.c > > +++ b/drivers/gpu/drm/i915/intel_lrc.c > > @@ -1401,18 +1401,6 @@ static u32 *gen9_init_indirectctx_bb(struct > > intel_engine_cs *engine, u32 *batch) > > > > batch = emit_lri(batch, lri, ARRAY_SIZE(lri)); > > > > - /* WaClearSlmSpaceAtContextSwitch:kbl */ > > - /* Actual scratch location is at 128 bytes offset */ > > - if (IS_KBL_REVID(engine->i915, 0, KBL_REVID_A0)) { > > - batch = gen8_emit_pipe_control(batch, > > - PIPE_CONTROL_FLUSH_L3 | > > - PIPE_CONTROL_GLOBAL_GTT_IVB | > > - PIPE_CONTROL_CS_STALL | > > - PIPE_CONTROL_QW_WRITE, > > - i915_ggtt_offset(engine->scratch) > > - + 2 * CACHELINE_BYTES); > > - } > > - > > /* WaMediaPoolStateCmdInWABB:bxt,glk */ > > if (HAS_POOLED_EU(engine->i915)) { > > /* > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > > b/drivers/gpu/drm/i915/intel_workarounds.c > > index ca1f78a42b17..39cd1f823ea9 100644 > > --- a/drivers/gpu/drm/i915/intel_workarounds.c > > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > > @@ -384,11 +384,6 @@ static int kbl_ctx_workarounds_init(struct > > drm_i915_private *dev_priv) > > if (ret) > > return ret; > > > > - /* WaDisableFenceDestinationToSLM:kbl (pre-prod) */ > > - if (IS_KBL_REVID(dev_priv, KBL_REVID_A0, KBL_REVID_A0)) > > - WA_SET_BIT_MASKED(HDC_CHICKEN0, > > - HDC_FENCE_DEST_SLM_DISABLE); > > - > > /* WaToEnableHwFixForPushConstHWBug:kbl */ > > if (IS_KBL_REVID(dev_priv, KBL_REVID_C0, REVID_FOREVER)) > > WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2, > > -- > > 2.20.0.rc1 > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
