On 07/01/2019 12:38, Tvrtko Ursulin wrote:
[snip]
+#define GEN8_TIMESTAMP_CNTS_PER_USEC 12 +#define GEN9_LP_TIMESTAMP_CNTS_PER_USEC 19 +static inline u32 cs_timestamp_in_us(struct drm_i915_private *dev_priv) +{ + u32 cs_timestamp_base = dev_priv->cs_timestamp_base; + + if (cs_timestamp_base) + return cs_timestamp_base; + + switch (INTEL_GEN(dev_priv)) { + default: + MISSING_CASE(INTEL_GEN(dev_priv)); + /* fall through */ + case 9: + cs_timestamp_base = IS_GEN9_LP(dev_priv) ? + GEN9_LP_TIMESTAMP_CNTS_PER_USEC : + GEN8_TIMESTAMP_CNTS_PER_USEC; + break; + case 8: + cs_timestamp_base = GEN8_TIMESTAMP_CNTS_PER_USEC; + break; + } + + dev_priv->cs_timestamp_base = cs_timestamp_base; + return cs_timestamp_base; +}We already have RUNTIME_INFO(i915)->cs_timestamp_frequency_khz and read_timestamp_frequency which sets it.
Here I missed the mark, please ignore. Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
