On Wed, Jan 16, 2019 at 03:54:21PM +0000, Chris Wilson wrote:
> Let static analyzers (smatch) know that we are not going to wander off
> the end of the array by providing a tight upper bound:
>
> drivers/gpu/drm/i915/intel_display.c:9532 hsw_get_transcoder_state() error:
> buffer overflow 'dev_priv->__info.trans_offsets' 6 <= 31
>
> References: 0716931a82b4 ("drm/i915/icl: fix transcoder state readout")
> Signed-off-by: Chris Wilson <[email protected]>
> Cc: Jani Nikula <[email protected]>
> Cc: Ville Syrjala <[email protected]>
> Cc: Imre Deak <[email protected]>
> Cc: Madhav Chauhan <[email protected]>
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 62d61fcad89c..b087ed285cc1 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9526,7 +9526,9 @@ static bool hsw_get_transcoder_state(struct intel_crtc
> *crtc,
> * XXX: Do intel_display_power_get_if_enabled before reading this (for
> * consistency and less surprising code; it's in always on power).
> */
> - for_each_set_bit(panel_transcoder, &panel_transcoder_mask, 32) {
> + for_each_set_bit(panel_transcoder,
> + &panel_transcoder_mask,
> + ARRAY_SIZE(INTEL_INFO(dev_priv)->trans_offsets)) {
Or just I915_MAX_TRANSCODERS maybe? Doesn't really matter I suppose.
Reviewed-by: Ville Syrjälä <[email protected]>
> enum pipe trans_pipe;
>
> tmp = I915_READ(TRANS_DDI_FUNC_CTL(panel_transcoder));
> --
> 2.20.1
--
Ville Syrjälä
Intel
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