PSR needs to do some checks against the current/future CRTC state to confirm if PSR hardware can support PSR in given configuration. So lets add this information to debugfs this way we can make IGT test smarter and skip tests when a valid a know reason caused PSR to not be enabled.
It will print PSR2 reason even if PSR1 is enabled as PSR2 have some additional requirements. Cc: Dhinakaran Pandiyan <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_psr.c | 13 ++++++++++++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 3b995f9fdc06..9ea99e9fb402 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2571,6 +2571,8 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) else status = "disabled"; seq_printf(m, "PSR mode: %s\n", status); + if (psr->disabled_reason) + seq_printf(m, "Disabled reason: %s\n", psr->disabled_reason); if (!psr->enabled) goto unlock; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0133d1da3d3c..2bedb523922d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -512,6 +512,7 @@ struct i915_psr { bool sink_not_reliable; bool irq_aux_error; u16 su_x_granularity; + const char *disabled_reason; }; enum intel_pch { diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 2c267c6501fc..a4214c133218 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -530,8 +530,10 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay; int psr_max_h = 0, psr_max_v = 0; - if (!dev_priv->psr.sink_psr2_support) + if (!dev_priv->psr.sink_psr2_support) { + dev_priv->psr.disabled_reason = "PSR2 not supported by sink"; return false; + } /* * DSC and PSR2 cannot be enabled simultaneously. If a requested @@ -540,6 +542,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, */ if (crtc_state->dsc_params.compression_enable) { DRM_DEBUG_KMS("PSR2 cannot be enabled since DSC is enabled\n"); + dev_priv->psr.disabled_reason = "PSR2 cannot be enabled with DSC"; return false; } @@ -555,6 +558,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, DRM_DEBUG_KMS("PSR2 not enabled, resolution %dx%d > max supported %dx%d\n", crtc_hdisplay, crtc_vdisplay, psr_max_h, psr_max_v); + dev_priv->psr.disabled_reason = "PSR2 cannot be enabled because resolution is to big"; return false; } @@ -567,9 +571,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, if (crtc_hdisplay % dev_priv->psr.su_x_granularity) { DRM_DEBUG_KMS("PSR2 not enabled, hdisplay(%d) not multiple of %d\n", crtc_hdisplay, dev_priv->psr.su_x_granularity); + dev_priv->psr.disabled_reason = "PSR2 SU granularity requirements not met"; return false; } + dev_priv->psr.disabled_reason = NULL; return true; } @@ -597,16 +603,19 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, */ if (dig_port->base.port != PORT_A) { DRM_DEBUG_KMS("PSR condition failed: Port not supported\n"); + dev_priv->psr.disabled_reason = "PSR not supported in port"; return; } if (dev_priv->psr.sink_not_reliable) { DRM_DEBUG_KMS("PSR sink implementation is not reliable\n"); + dev_priv->psr.disabled_reason = "PSR sink implementation is not reliable"; return; } if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) { DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n"); + dev_priv->psr.disabled_reason = "PSR HW do not support interlaced mode"; return; } @@ -614,6 +623,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, if (psr_setup_time < 0) { DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time (0x%02x)\n", intel_dp->psr_dpcd[1]); + dev_priv->psr.disabled_reason = "PSR setup time is invalid"; return; } @@ -621,6 +631,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) { DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) too long\n", psr_setup_time); + dev_priv->psr.disabled_reason = "PSR setup time is longer than vblank"; return; } -- 2.20.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
