On Fri, Feb 01, 2019 at 09:43:02PM +0530, Anshuman Gupta wrote:
> From: Jyoti Yadav <[email protected]>
> 
> Added new subtest for DC6 entry during DPMS on/off cycle.
> During DPMS on/off cycle DC6 counter is incremented.
> 
> v2: Renamed the subtest name.
> v3: Rebased.
> v4: Rebased and address review comment.
> 
> Signed-off-by: Jyoti Yadav <[email protected]>
> Signed-off-by: Anshuman Gupta <[email protected]>
> ---
>  tests/pm_dc.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/tests/pm_dc.c b/tests/pm_dc.c
> index 05f1363..244665d 100644
> --- a/tests/pm_dc.c
> +++ b/tests/pm_dc.c
> @@ -241,6 +241,15 @@ int main(int argc, char *argv[])
>               test_dc_state_dpms(&data, CHECK_DC5);
>       }
>  
> +     igt_subtest("dc6-dpms") {
> +             /* Check DC6 counter is available for the platform.
> +              * Skip the test if counter is not available.
> +              */
> +             read_dc_counter(data.drm_fd, CHECK_DC6);
> +             test_dc_state_dpms(&data, CHECK_DC6);
> +             //cleanup(&data);

Some debugging left-over above. That makes me think, why do the PSR
subtests do a modeset while the dpms ones don't? I think there is no
reason to make them behave differently.

> +     }
> +
>       igt_fixture {
>               close(data.debugfs_fd);
>               display_fini(&data);
> -- 
> 2.7.4
> 
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to