We'll re-enable select bits as needed after testing and power measurement.

v2: split out wake handling bits (Jani)

Signed-off-by: Jesse Barnes <[email protected]>
---
 drivers/gpu/drm/i915/intel_pm.c |   11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 37c7974..3fae9ff 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3987,7 +3987,16 @@ static void valleyview_init_clock_gating(struct 
drm_device *dev)
         * Disable clock gating on th GCFG unit to prevent a delay
         * in the reporting of vblank events.
         */
-       I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
+       I915_WRITE(VLV_GUNIT_CLOCK_GATE, 0xffffffff);
+
+       /* Conservative clock gating settings for now */
+       I915_WRITE(0x9400, 0xffffffff);
+       I915_WRITE(0x9404, 0xffffffff);
+       I915_WRITE(0x9408, 0xffffffff);
+       I915_WRITE(0x940c, 0xffffffff);
+       I915_WRITE(0x9410, 0xffffffff);
+       I915_WRITE(0x9414, 0xffffffff);
+       I915_WRITE(0x9418, 0xffffffff);
 }
 
 static void g4x_init_clock_gating(struct drm_device *dev)
-- 
1.7.10.4

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