On Fri, Apr 12, 2019 at 03:29:07PM -0700, José Roberto de Souza wrote: > Just moving it to reduce the tabs and avoid break code lines. > No behavior changes intended here.
this function is indeed big and deserves a split. I wonder why haven't you moved the entire de_misc block to a separated function instead only the middle of the handling... i mean, including reg read above and error message below. > > v2: > - Reading misc display IRQ outside of gen8_de_misc_irq_handler() as > other irq handlers (Dhinakaran) > > Cc: Dhinakaran Pandiyan <[email protected]> > Signed-off-by: José Roberto de Souza <[email protected]> > --- > drivers/gpu/drm/i915/i915_irq.c | 45 ++++++++++++++++++--------------- > 1 file changed, 25 insertions(+), 20 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index d934545445e1..820d89300454 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2740,6 +2740,28 @@ static u32 gen8_de_port_aux_mask(struct > drm_i915_private *dev_priv) > return mask; > } > > +static void > +gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir) > +{ > + bool found = false; > + > + if (iir & GEN8_DE_MISC_GSE) { > + intel_opregion_asle_intr(dev_priv); > + found = true; > + } > + > + if (iir & GEN8_DE_EDP_PSR) { > + u32 psr_iir = I915_READ(EDP_PSR_IIR); > + > + intel_psr_irq_handler(dev_priv, psr_iir); > + I915_WRITE(EDP_PSR_IIR, psr_iir); > + found = true; > + } > + > + if (!found) > + DRM_ERROR("Unexpected DE Misc interrupt\n"); > +} > + > static irqreturn_t > gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) > { > @@ -2750,29 +2772,12 @@ gen8_de_irq_handler(struct drm_i915_private > *dev_priv, u32 master_ctl) > if (master_ctl & GEN8_DE_MISC_IRQ) { > iir = I915_READ(GEN8_DE_MISC_IIR); > if (iir) { > - bool found = false; > - > I915_WRITE(GEN8_DE_MISC_IIR, iir); > ret = IRQ_HANDLED; > - > - if (iir & GEN8_DE_MISC_GSE) { > - intel_opregion_asle_intr(dev_priv); > - found = true; > - } > - > - if (iir & GEN8_DE_EDP_PSR) { > - u32 psr_iir = I915_READ(EDP_PSR_IIR); > - > - intel_psr_irq_handler(dev_priv, psr_iir); > - I915_WRITE(EDP_PSR_IIR, psr_iir); > - found = true; > - } > - > - if (!found) > - DRM_ERROR("Unexpected DE Misc interrupt\n"); > - } > - else > + gen8_de_misc_irq_handler(dev_priv, iir); > + } else { > DRM_ERROR("The master control interrupt lied (DE > MISC)!\n"); > + } > } > > if (INTEL_GEN(dev_priv) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) { > -- > 2.21.0 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
