On Wed, 2019-04-17 at 15:37 -0700, José Roberto de Souza wrote:
> Just moving it to reduce the tabs and avoid break code lines.
> No behavior changes intended here.
>
> v2:
> - Reading misc display IRQ outside of gen8_de_misc_irq_handler() as
> other irq handlers (Dhinakaran)
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 45 ++++++++++++++++++---------------
> 1 file changed, 25 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b92cfd69134b..a1299f10ed49 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2768,6 +2768,28 @@ static u32 gen8_de_port_aux_mask(struct
> drm_i915_private *dev_priv)
> return mask;
> }
>
> +static void
> +gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
> +{
> + bool found = false;
> +
> + if (iir & GEN8_DE_MISC_GSE) {
> + intel_opregion_asle_intr(dev_priv);
> + found = true;
> + }
> +
> + if (iir & GEN8_DE_EDP_PSR) {
> + u32 psr_iir = I915_READ(EDP_PSR_IIR);
> +
> + intel_psr_irq_handler(dev_priv, psr_iir);
> + I915_WRITE(EDP_PSR_IIR, psr_iir);
Two things unrelated to your refactoring,
1) we can ack the irq right after reading the iir bits. I had noticed this a
while back but never got to changing it.
2) we don't DRM_ERROR() for unexpected PSR interrupts like how other handlers
do. Not sure what's the point though, other than getting to know that the
hardware is broken.
Ville, any idea why unexpected interrupts warrant DRM_ERROR().
This patch is
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
> + found = true;
> + }
> +
> + if (!found)
> + DRM_ERROR("Unexpected DE Misc interrupt\n");
> +}
> +
> static irqreturn_t
> gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
> {
> @@ -2778,29 +2800,12 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv,
> u32 master_ctl)
> if (master_ctl & GEN8_DE_MISC_IRQ) {
> iir = I915_READ(GEN8_DE_MISC_IIR);
> if (iir) {
> - bool found = false;
> -
> I915_WRITE(GEN8_DE_MISC_IIR, iir);
> ret = IRQ_HANDLED;
> -
> - if (iir & GEN8_DE_MISC_GSE) {
> - intel_opregion_asle_intr(dev_priv);
> - found = true;
> - }
> -
> - if (iir & GEN8_DE_EDP_PSR) {
> - u32 psr_iir = I915_READ(EDP_PSR_IIR);
> -
> - intel_psr_irq_handler(dev_priv, psr_iir);
> - I915_WRITE(EDP_PSR_IIR, psr_iir);
> - found = true;
> - }
> -
> - if (!found)
> - DRM_ERROR("Unexpected DE Misc interrupt\n");
> - }
> - else
> + gen8_de_misc_irq_handler(dev_priv, iir);
> + } else {
> DRM_ERROR("The master control interrupt lied (DE
> MISC)!\n");
> + }
> }
>
> if (INTEL_GEN(dev_priv) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) {
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
