GPU reset is now available with GuC enabled,
so re-enable our check that this reset is usable
from atomic context.
Signed-off-by: Fernando Pacheco <fernando.pach...@intel.com>
---
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index 050bd1e19e02..2fd33aad8683 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -1814,9 +1814,6 @@ static int igt_atomic_reset(void *arg)
/* Check that the resets are usable from atomic context */
- if (USES_GUC_SUBMISSION(i915))
- return 0; /* guc is dead; long live the guc */
-
igt_global_reset_lock(i915);
mutex_lock(&i915->drm.struct_mutex);
wakeref = intel_runtime_pm_get(i915);
@@ -1846,6 +1843,9 @@ static int igt_atomic_reset(void *arg)
force_reset(i915);
}
+ if (USES_GUC_SUBMISSION(i915))
+ goto unlock;
+
if (intel_has_reset_engine(i915)) {
struct intel_engine_cs *engine;
enum intel_engine_id id;
--
2.21.0
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