On Tue, 2013-02-19 at 13:31 -0800, Jesse Barnes wrote:
> We may need to disable the panel when flipping to a new buffer, so check
> the state here and zero it out if needed, otherwise leave it alone.
>
> Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/intel_display.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 595590c..91660b1 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2304,6 +2304,25 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int
> y,
> if (crtc->fb)
> intel_finish_fb(crtc->fb);
>
> + I915_WRITE(PIPESRC(intel_crtc->pipe),
> + ((crtc->mode.hdisplay - 1) << 16) |
> + (crtc->mode.vdisplay - 1));
> + if (!dev_priv->pch_pf_size &&
> + (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
> + intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
> + /* Force use of hard-coded filter coefficients
> + * as some pre-programmed values are broken,
> + * e.g. x201.
> + */
Nitpick: multiline comments should start with an empty /* line.
> + if (IS_IVYBRIDGE(dev))
> + I915_WRITE(PF_CTL(intel_crtc->pipe), 0);
> + else
> + I915_WRITE(PF_CTL(intel_crtc->pipe), 0);
No difference in the branches?
> + I915_WRITE(PF_WIN_POS(intel_crtc->pipe), 0);
> + I915_WRITE(PF_WIN_SZ(intel_crtc->pipe), 0);
> + }
> +
> +
> ret = dev_priv->display.update_plane(crtc, fb, x, y);
> if (ret) {
> intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);
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