On Thu, Jul 11, 2019 at 01:44:01PM +0300, Stanislav Lisovskiy wrote:
> According to Bspec clock divisor registers in GeminiLake
> should be initialized by shifting 1(<<) to amount of correspondent
> divisor. While i915 was writing all this time that value as is.
> 
> Surprisingly that it by accident worked, until we met some issues
> with Microtech Etab.
> 
> v2: Added Fixes tag and cc
> 
> Signed-off-by: [email protected]

Your git is a bit misconfigured
-:46: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal
patch author 'Stanislav Lisovskiy <[email protected]>'

And I think we want cc:stable on this as well.

> Reviewed-by: Vandita Kulkarni <[email protected]>
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=108826
> Fixes: bcc657004841 ("drm/i915/glk: Program txesc clock divider for GLK")
> Cc: Deepak M <[email protected]>
> Cc: Madhav Chauhan <[email protected]>
> Cc: Jani Nikula <[email protected]>
> Cc: Jani Nikula <[email protected]>
> Cc: Joonas Lahtinen <[email protected]>
> Cc: Rodrigo Vivi <[email protected]>
> Cc: [email protected]
> ---
>  drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c 
> b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
> index 99cc3e2e9c2c..f016a776a39e 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
> @@ -396,8 +396,8 @@ static void glk_dsi_program_esc_clock(struct drm_device 
> *dev,
>       else
>               txesc2_div = 10;
>  
> -     I915_WRITE(MIPIO_TXESC_CLK_DIV1, txesc1_div & GLK_TX_ESC_CLK_DIV1_MASK);
> -     I915_WRITE(MIPIO_TXESC_CLK_DIV2, txesc2_div & GLK_TX_ESC_CLK_DIV2_MASK);
> +     I915_WRITE(MIPIO_TXESC_CLK_DIV1, (1 << (txesc1_div - 1)) & 
> GLK_TX_ESC_CLK_DIV1_MASK);
> +     I915_WRITE(MIPIO_TXESC_CLK_DIV2, (1 << (txesc2_div - 1)) & 
> GLK_TX_ESC_CLK_DIV2_MASK);
>  }
>  
>  /* Program BXT Mipi clocks and dividers */
> -- 
> 2.17.1

-- 
Ville Syrjälä
Intel
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