>-----Original Message----- >From: Sharma, Swati2 >Sent: Monday, August 26, 2019 11:56 AM >To: [email protected] >Cc: Nikula, Jani <[email protected]>; Sharma, Shashank ><[email protected]>; Manna, Animesh <[email protected]>; >Nautiyal, Ankit K <[email protected]>; [email protected]; >[email protected]; Shankar, Uma <[email protected]>; Sharma, >Swati2 <[email protected]> >Subject: [v8][PATCH 01/10] drm/i915/display: Add func to get gamma bit >precision > >Each platform supports different gamma modes and each gamma mode has different >bit precision. Add func/platform to get bit precision corresponding to gamma >mode.
I think it would be good to add some explanation as to why this is needed. Also what all platforms are supported by this currently. >Signed-off-by: Swati Sharma <[email protected]> >--- > drivers/gpu/drm/i915/display/intel_color.c | 79 ++++++++++++++++++++++++++++++ >drivers/gpu/drm/i915/display/intel_color.h | 1 + > 2 files changed, 80 insertions(+) > >diff --git a/drivers/gpu/drm/i915/display/intel_color.c >b/drivers/gpu/drm/i915/display/intel_color.c >index 71a0201..d2c1297 100644 >--- a/drivers/gpu/drm/i915/display/intel_color.c >+++ b/drivers/gpu/drm/i915/display/intel_color.c >@@ -1371,6 +1371,85 @@ static int icl_color_check(struct intel_crtc_state >*crtc_state) > return 0; > } > >+static int i9xx_gamma_precision(const struct intel_crtc_state >+*crtc_state) { >+ if (!crtc_state->gamma_enable) >+ return 0; >+ >+ switch (crtc_state->gamma_mode) { >+ case GAMMA_MODE_MODE_8BIT: >+ return 8; >+ case GAMMA_MODE_MODE_10BIT: >+ return 16; >+ default: >+ MISSING_CASE(crtc_state->gamma_mode); >+ return 0; >+ } >+} >+ >+static int chv_gamma_precision(const struct intel_crtc_state >+*crtc_state) { >+ if (crtc_state->cgm_mode & CGM_PIPE_MODE_GAMMA) >+ return 10; >+ else >+ return i9xx_gamma_precision(crtc_state); } >+ >+static int glk_gamma_precision(const struct intel_crtc_state >+*crtc_state) { >+ if (!crtc_state->gamma_enable) >+ return 0; >+ >+ switch (crtc_state->gamma_mode) { >+ case GAMMA_MODE_MODE_8BIT: >+ return 8; >+ case GAMMA_MODE_MODE_10BIT: >+ return 10; >+ default: >+ MISSING_CASE(crtc_state->gamma_mode); >+ return 0; >+ } >+} >+ >+static int ilk_gamma_precision(const struct intel_crtc_state >+*crtc_state) { >+ if (!crtc_state->gamma_enable) >+ return 0; >+ >+ if ((crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA) == 0) >+ return 0; >+ >+ switch (crtc_state->gamma_mode) { >+ case GAMMA_MODE_MODE_8BIT: >+ return 8; >+ case GAMMA_MODE_MODE_10BIT: >+ return 10; >+ default: >+ MISSING_CASE(crtc_state->gamma_mode); >+ return 0; >+ } >+} >+ >+int intel_color_get_gamma_bit_precision(const struct intel_crtc_state >+*crtc_state) { >+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); >+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); >+ >+ if (HAS_GMCH(dev_priv)) { >+ if (IS_CHERRYVIEW(dev_priv)) >+ return chv_gamma_precision(crtc_state); >+ else >+ return i9xx_gamma_precision(crtc_state); >+ } else { >+ if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) >+ return glk_gamma_precision(crtc_state); >+ else if (IS_IRONLAKE(dev_priv)) >+ return ilk_gamma_precision(crtc_state); >+ } >+ >+ return 0; >+} >+ > void intel_color_init(struct intel_crtc *crtc) { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); diff --git >a/drivers/gpu/drm/i915/display/intel_color.h >b/drivers/gpu/drm/i915/display/intel_color.h >index 057e8ac..0226d3a 100644 >--- a/drivers/gpu/drm/i915/display/intel_color.h >+++ b/drivers/gpu/drm/i915/display/intel_color.h >@@ -14,5 +14,6 @@ > void intel_color_commit(const struct intel_crtc_state *crtc_state); void >intel_color_load_luts(const struct intel_crtc_state *crtc_state); void >intel_color_get_config(struct intel_crtc_state *crtc_state); >+int intel_color_get_gamma_bit_precision(const struct intel_crtc_state >+*crtc_state); > > #endif /* __INTEL_COLOR_H__ */ >-- >1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
