We tweak the tests marked as runnable in simulation to run more quickly, more often then not at the expense of stress testing (which is of an arguable interest for the initial bring up in simulation). Hopefully the values chosen still test something, which is not always straightforward.
It does run quickly, the number on an IVB machines are: $ time sudo IGT_SIMULATION=0 ./piglit-run.py tests/igt.tests foo [...] real 2m0.141s user 0m16.365s sys 1m33.382s Vs. $ time sudo IGT_SIMULATION=1 ./piglit-run.py tests/igt.tests foo [...] real 0m0.448s user 0m0.226s sys 0m0.183s Signed-off-by: Damien Lespiau <[email protected]> --- tests/gem_cpu_reloc.c | 3 +++ tests/gem_ctx_basic.c | 5 +++++ tests/gem_exec_nop.c | 2 +- tests/gem_mmap_gtt.c | 5 ++++- tests/gem_pipe_control_store_loop.c | 2 +- tests/gem_render_linear_blits.c | 6 ++++++ tests/gem_ring_sync_loop.c | 2 +- tests/gem_storedw_batches_loop.c | 8 +++++--- tests/gem_storedw_loop_blt.c | 8 +++++--- tests/gem_storedw_loop_bsd.c | 8 +++++--- tests/gem_storedw_loop_render.c | 8 +++++--- tests/gem_tiled_blits.c | 6 ++++++ 12 files changed, 47 insertions(+), 16 deletions(-) diff --git a/tests/gem_cpu_reloc.c b/tests/gem_cpu_reloc.c index baf8301..ad70e40 100644 --- a/tests/gem_cpu_reloc.c +++ b/tests/gem_cpu_reloc.c @@ -153,6 +153,9 @@ int main(int argc, char **argv) } count = aper_size / 4096 * 2; + if (drmtest_run_in_simulation()) + count = 10; + handles = malloc (count * sizeof(uint32_t)); assert(handles); diff --git a/tests/gem_ctx_basic.c b/tests/gem_ctx_basic.c index 3757d84..729c79c 100644 --- a/tests/gem_ctx_basic.c +++ b/tests/gem_ctx_basic.c @@ -143,6 +143,11 @@ int main(int argc, char *argv[]) fd = drm_open_any(); devid = intel_get_drm_devid(fd); + if (drmtest_run_in_simulation()) { + num_contexts = 2; + iter = 4; + } + parse(argc, argv); threads = calloc(num_contexts, sizeof(*threads)); diff --git a/tests/gem_exec_nop.c b/tests/gem_exec_nop.c index 5888432..35cb23d 100644 --- a/tests/gem_exec_nop.c +++ b/tests/gem_exec_nop.c @@ -96,7 +96,7 @@ static void loop(int fd, uint32_t handle, unsigned ring_id, const char *ring_nam skipped_all = false; - for (count = 1; count <= 1<<17; count <<= 1) { + for (count = 1; count <= SLOW_QUICK(1<<17, 1<<4); count <<= 1) { struct timeval start, end; gettimeofday(&start, NULL); diff --git a/tests/gem_mmap_gtt.c b/tests/gem_mmap_gtt.c index d759340..e53a942 100644 --- a/tests/gem_mmap_gtt.c +++ b/tests/gem_mmap_gtt.c @@ -40,7 +40,7 @@ #include "i915_drm.h" #include "drmtest.h" -#define OBJECT_SIZE (16*1024*1024) +static int OBJECT_SIZE = 16*1024*1024; static void set_domain(int fd, uint32_t handle) { @@ -148,6 +148,9 @@ int main(int argc, char **argv) { int fd; + if (drmtest_run_in_simulation()) + OBJECT_SIZE = 1 * 1024 * 1024; + drmtest_subtest_init(argc, argv); fd = drm_open_any(); diff --git a/tests/gem_pipe_control_store_loop.c b/tests/gem_pipe_control_store_loop.c index e03cddd..af6a758 100644 --- a/tests/gem_pipe_control_store_loop.c +++ b/tests/gem_pipe_control_store_loop.c @@ -70,7 +70,7 @@ store_pipe_control_loop(void) uint32_t *buf; drm_intel_bo *target_bo; - for (i = 0; i < 0x10000; i++) { + for (i = 0; i < SLOW_QUICK(0x10000, 4); i++) { /* we want to check tlb consistency of the pipe_control target, * so get a new buffer every time around */ target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); diff --git a/tests/gem_render_linear_blits.c b/tests/gem_render_linear_blits.c index a7e0189..c94f451 100644 --- a/tests/gem_render_linear_blits.c +++ b/tests/gem_render_linear_blits.c @@ -81,8 +81,11 @@ int main(int argc, char **argv) batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); count = 0; + if (drmtest_run_in_simulation()) + count = 2; if (argc > 1) count = atoi(argv[1]); + if (count == 0) count = 3 * gem_aperture_size(fd) / SIZE / 2; else if (count < 2) { @@ -127,6 +130,9 @@ int main(int argc, char **argv) for (i = 0; i < count; i++) check_bo(fd, bo[i]->handle, start_val[i]); + if (drmtest_run_in_simulation()) + return 0; + printf("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { struct scratch_buf src, dst; diff --git a/tests/gem_ring_sync_loop.c b/tests/gem_ring_sync_loop.c index 501e97c..43357e1 100644 --- a/tests/gem_ring_sync_loop.c +++ b/tests/gem_ring_sync_loop.c @@ -99,7 +99,7 @@ store_dword_loop(int fd) srandom(0xdeadbeef); - for (i = 0; i < 0x100000; i++) { + for (i = 0; i < SLOW_QUICK(0x100000, 10); i++) { int ring = random() % num_rings + 1; if (ring == I915_EXEC_RENDER) { diff --git a/tests/gem_storedw_batches_loop.c b/tests/gem_storedw_batches_loop.c index 79eebb2..3b25524 100644 --- a/tests/gem_storedw_batches_loop.c +++ b/tests/gem_storedw_batches_loop.c @@ -60,7 +60,7 @@ store_dword_loop(int divider) if (!has_ppgtt) cmd |= MI_MEM_VIRTUAL; - for (i = 0; i < SLOW_QUICK(0x80000, 0x10); i++) { + for (i = 0; i < SLOW_QUICK(0x80000, 4); i++) { cmd_bo = drm_intel_bo_alloc(bufmgr, "cmd bo", 4096, 4096); if (!cmd_bo) { fprintf(stderr, "failed to alloc cmd bo\n"); @@ -172,8 +172,10 @@ int main(int argc, char **argv) store_dword_loop(1); store_dword_loop(2); - store_dword_loop(3); - store_dword_loop(5); + if (!drmtest_run_in_simulation()) { + store_dword_loop(3); + store_dword_loop(5); + } drm_intel_bo_unreference(target_bo); drm_intel_bufmgr_destroy(bufmgr); diff --git a/tests/gem_storedw_loop_blt.c b/tests/gem_storedw_loop_blt.c index cacae3a..dfb613b 100644 --- a/tests/gem_storedw_loop_blt.c +++ b/tests/gem_storedw_loop_blt.c @@ -63,7 +63,7 @@ store_dword_loop(int divider) if (!has_ppgtt) cmd |= MI_MEM_VIRTUAL; - for (i = 0; i < SLOW_QUICK(0x100000, 0x10); i++) { + for (i = 0; i < SLOW_QUICK(0x100000, 4); i++) { BEGIN_BATCH(4); OUT_BATCH(cmd); OUT_BATCH(0); /* reserved */ @@ -150,8 +150,10 @@ int main(int argc, char **argv) store_dword_loop(1); store_dword_loop(2); - store_dword_loop(3); - store_dword_loop(5); + if (!drmtest_run_in_simulation()) { + store_dword_loop(3); + store_dword_loop(5); + } drm_intel_bo_unreference(target_buffer); intel_batchbuffer_free(batch); diff --git a/tests/gem_storedw_loop_bsd.c b/tests/gem_storedw_loop_bsd.c index 232c3a6..6aefb9a 100644 --- a/tests/gem_storedw_loop_bsd.c +++ b/tests/gem_storedw_loop_bsd.c @@ -63,7 +63,7 @@ store_dword_loop(int divider) if (!has_ppgtt) cmd |= MI_MEM_VIRTUAL; - for (i = 0; i < SLOW_QUICK(0x100000, 0x10); i++) { + for (i = 0; i < SLOW_QUICK(0x100000, 4); i++) { BEGIN_BATCH(4); OUT_BATCH(cmd); OUT_BATCH(0); /* reserved */ @@ -156,8 +156,10 @@ int main(int argc, char **argv) store_dword_loop(1); store_dword_loop(2); - store_dword_loop(3); - store_dword_loop(5); + if (!drmtest_run_in_simulation()) { + store_dword_loop(3); + store_dword_loop(5); + } drm_intel_bo_unreference(target_buffer); intel_batchbuffer_free(batch); diff --git a/tests/gem_storedw_loop_render.c b/tests/gem_storedw_loop_render.c index fe09834..e41ecc7 100644 --- a/tests/gem_storedw_loop_render.c +++ b/tests/gem_storedw_loop_render.c @@ -63,7 +63,7 @@ store_dword_loop(int divider) if (!has_ppgtt) cmd |= MI_MEM_VIRTUAL; - for (i = 0; i < SLOW_QUICK(0x100000, 0x10); i++) { + for (i = 0; i < SLOW_QUICK(0x100000, 4); i++) { BEGIN_BATCH(4); OUT_BATCH(cmd); OUT_BATCH(0); /* reserved */ @@ -144,8 +144,10 @@ int main(int argc, char **argv) store_dword_loop(1); store_dword_loop(2); - store_dword_loop(3); - store_dword_loop(5); + if (!drmtest_run_in_simulation()) { + store_dword_loop(3); + store_dword_loop(5); + } drm_intel_bo_unreference(target_buffer); intel_batchbuffer_free(batch); diff --git a/tests/gem_tiled_blits.c b/tests/gem_tiled_blits.c index bb43976..86ff745 100644 --- a/tests/gem_tiled_blits.c +++ b/tests/gem_tiled_blits.c @@ -127,8 +127,11 @@ int main(int argc, char **argv) fd = drm_open_any(); count = 0; + if (drmtest_run_in_simulation()) + count = 2; if (argc > 1) count = atoi(argv[1]); + if (count == 0) { count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; count += (count & 1) == 0; @@ -175,6 +178,9 @@ int main(int argc, char **argv) for (i = 0; i < count; i++) check_bo(bo[i], bo_start_val[i]); + if (drmtest_run_in_simulation()) + return 0; + printf("Cyclic blits, backward...\n"); for (i = 0; i < count * 4; i++) { int src = (i+1) % count; -- 1.8.1.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
