I get a permanent FIFO underrun when enabling FEC with big joiner, so for now disable it.
It seems that even at 1024x768 resolution without bigjoiner we don't get a working configuration. Flag is set but vblank timing shows that vblanks are delivered slightly faster, so the extra overhead we calculated for data M/N goes unused. Not-Signed-off-by: Maarten Lankhorst <[email protected]> --- drivers/gpu/drm/i915/display/intel_dp.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 4dfb78dc7fa2..02242a16640b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1877,7 +1877,8 @@ static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp, static bool intel_dp_supports_dsc(struct intel_dp *intel_dp, const struct intel_crtc_state *pipe_config) { - if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable) + /* HACK: Disable FEC until we solved FIFO underruns */ + if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable && 0) return false; return intel_dp_source_supports_dsc(intel_dp, pipe_config) && @@ -2024,8 +2025,9 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, int pipe_bpp; int ret; + /* HACK: Disable FEC until we solved FIFO underruns */ pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) && - intel_dp_supports_fec(intel_dp, pipe_config); + intel_dp_supports_fec(intel_dp, pipe_config) && 0; if (!intel_dp_supports_dsc(intel_dp, pipe_config)) return -EINVAL; -- 2.20.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
