On Tue, 01 Oct 2019, Ville Syrjälä <[email protected]> wrote:
> On Tue, Oct 01, 2019 at 06:25:06PM +0300, Jani Nikula wrote:
>> Split out the code related to vga client and vgaarb all over the place
>> into new intel_vga.[ch]. No functional changes.
>>
>> Cc: Ville Syrjälä <[email protected]>
>> Cc: Chris Wilson <[email protected]>
>> Signed-off-by: Jani Nikula <[email protected]>
>> ---
>> drivers/gpu/drm/i915/Makefile | 3 +-
>> drivers/gpu/drm/i915/display/intel_display.c | 97 +----------
>> drivers/gpu/drm/i915/display/intel_display.h | 3 -
>> .../drm/i915/display/intel_display_power.c | 24 +--
>> drivers/gpu/drm/i915/display/intel_vga.c | 160 ++++++++++++++++++
>> drivers/gpu/drm/i915/display/intel_vga.h | 18 ++
>> drivers/gpu/drm/i915/i915_drv.c | 30 +---
>> drivers/gpu/drm/i915/i915_pci.c | 1 -
>> drivers/gpu/drm/i915/i915_suspend.c | 3 +-
>> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 -
>> 10 files changed, 194 insertions(+), 146 deletions(-)
>> create mode 100644 drivers/gpu/drm/i915/display/intel_vga.c
>> create mode 100644 drivers/gpu/drm/i915/display/intel_vga.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index e04463d85401..d2b53b5add81 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -184,7 +184,8 @@ i915-y += \
>> display/intel_psr.o \
>> display/intel_quirks.o \
>> display/intel_sprite.o \
>> - display/intel_tc.o
>> + display/intel_tc.o \
>> + display/intel_vga.o
>> i915-$(CONFIG_ACPI) += \
>> display/intel_acpi.o \
>> display/intel_opregion.o
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index f1328c08f4ad..d99c59e97568 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -31,7 +31,6 @@
>> #include <linux/module.h>
>> #include <linux/dma-resv.h>
>> #include <linux/slab.h>
>> -#include <linux/vgaarb.h>
>>
>> #include <drm/drm_atomic.h>
>> #include <drm/drm_atomic_helper.h>
>> @@ -79,6 +78,7 @@
>> #include "intel_sideband.h"
>> #include "intel_sprite.h"
>> #include "intel_tc.h"
>> +#include "intel_vga.h"
>>
>> /* Primary plane formats for gen <= 3 */
>> static const u32 i8xx_primary_formats[] = {
>> @@ -4241,7 +4241,7 @@ __intel_display_resume(struct drm_device *dev,
>> int i, ret;
>>
>> intel_modeset_setup_hw_state(dev, ctx);
>> - i915_redisable_vga(to_i915(dev));
>> + intel_vga_redisable(to_i915(dev));
>>
>> if (!state)
>> return 0;
>> @@ -15994,35 +15994,6 @@ void intel_init_display_hooks(struct
>> drm_i915_private *dev_priv)
>>
>> }
>>
>> -static i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
>> -{
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> - return VLV_VGACNTRL;
>> - else if (INTEL_GEN(dev_priv) >= 5)
>> - return CPU_VGACNTRL;
>> - else
>> - return VGACNTRL;
>> -}
>> -
>> -/* Disable the VGA plane that we never use */
>> -static void i915_disable_vga(struct drm_i915_private *dev_priv)
>> -{
>> - struct pci_dev *pdev = dev_priv->drm.pdev;
>> - u8 sr1;
>> - i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
>> -
>> - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
>> - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> - outb(SR01, VGA_SR_INDEX);
>> - sr1 = inb(VGA_SR_DATA);
>> - outb(sr1 | 1<<5, VGA_SR_DATA);
>> - vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> - udelay(300);
>> -
>> - I915_WRITE(vga_reg, VGA_DISP_DISABLE);
>> - POSTING_READ(vga_reg);
>> -}
>> -
>> void intel_modeset_init_hw(struct drm_i915_private *i915)
>> {
>> intel_update_cdclk(i915);
>> @@ -16288,7 +16259,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
>> intel_update_max_cdclk(i915);
>>
>> /* Just disable it once at startup */
>> - i915_disable_vga(i915);
>> + intel_vga_disable(i915);
>> intel_setup_outputs(i915);
>>
>> drm_modeset_lock_all(dev);
>> @@ -16647,39 +16618,6 @@ static void intel_sanitize_encoder(struct
>> intel_encoder *encoder)
>> icl_sanitize_encoder_pll_mapping(encoder);
>> }
>>
>> -void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
>> -{
>> - i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
>> -
>> - if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
>> - DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
>> - i915_disable_vga(dev_priv);
>> - }
>> -}
>> -
>> -void i915_redisable_vga(struct drm_i915_private *dev_priv)
>> -{
>> - intel_wakeref_t wakeref;
>> -
>> - /*
>> - * This function can be called both from intel_modeset_setup_hw_state or
>> - * at a very early point in our resume sequence, where the power well
>> - * structures are not yet restored. Since this function is at a very
>> - * paranoid "someone might have enabled VGA while we were not looking"
>> - * level, just check if the power well is enabled instead of trying to
>> - * follow the "don't touch the power well if we don't need it" policy
>> - * the rest of the driver uses.
>> - */
>> - wakeref = intel_display_power_get_if_enabled(dev_priv,
>> - POWER_DOMAIN_VGA);
>> - if (!wakeref)
>> - return;
>> -
>> - i915_redisable_vga_power_on(dev_priv);
>> -
>> - intel_display_power_put(dev_priv, POWER_DOMAIN_VGA, wakeref);
>> -}
>> -
>> /* FIXME read out full plane state for all planes */
>> static void readout_plane_state(struct drm_i915_private *dev_priv)
>> {
>> @@ -17188,35 +17126,6 @@ void intel_modeset_driver_remove(struct
>> drm_i915_private *i915)
>> intel_fbc_cleanup_cfb(i915);
>> }
>>
>> -/*
>> - * set vga decode state - true == enable VGA decode
>> - */
>> -int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool
>> state)
>> -{
>> - unsigned reg = INTEL_GEN(dev_priv) >= 6 ? SNB_GMCH_CTRL :
>> INTEL_GMCH_CTRL;
>> - u16 gmch_ctrl;
>> -
>> - if (pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl)) {
>> - DRM_ERROR("failed to read control word\n");
>> - return -EIO;
>> - }
>> -
>> - if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !state)
>> - return 0;
>> -
>> - if (state)
>> - gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
>> - else
>> - gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
>> -
>> - if (pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl)) {
>> - DRM_ERROR("failed to write control word\n");
>> - return -EIO;
>> - }
>> -
>> - return 0;
>> -}
>> -
>> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
>>
>> struct intel_display_error_state {
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
>> b/drivers/gpu/drm/i915/display/intel_display.h
>> index 4b9e18e5a263..2782f23ee887 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> @@ -579,10 +579,7 @@ void intel_display_print_error_state(struct
>> drm_i915_error_state_buf *e,
>> void intel_modeset_init_hw(struct drm_i915_private *i915);
>> int intel_modeset_init(struct drm_i915_private *i915);
>> void intel_modeset_driver_remove(struct drm_i915_private *i915);
>> -int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool
>> state);
>> void intel_display_resume(struct drm_device *dev);
>> -void i915_redisable_vga(struct drm_i915_private *dev_priv);
>> -void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
>> void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
>>
>> /* modesetting asserts */
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
>> b/drivers/gpu/drm/i915/display/intel_display_power.c
>> index f1186bc23542..bb642a1a0dd4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>> @@ -3,8 +3,6 @@
>> * Copyright © 2019 Intel Corporation
>> */
>>
>> -#include <linux/vgaarb.h>
>> -
>> #include "display/intel_crt.h"
>> #include "display/intel_dp.h"
>>
>> @@ -19,6 +17,7 @@
>> #include "intel_hotplug.h"
>> #include "intel_sideband.h"
>> #include "intel_tc.h"
>> +#include "intel_vga.h"
>>
>> bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
>> enum i915_power_well_id power_well_id);
>> @@ -267,23 +266,8 @@ bool intel_display_power_is_enabled(struct
>> drm_i915_private *dev_priv,
>> static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv,
>> u8 irq_pipe_mask, bool has_vga)
>> {
>> - struct pci_dev *pdev = dev_priv->drm.pdev;
>> -
>> - /*
>> - * After we re-enable the power well, if we touch VGA register 0x3d5
>> - * we'll get unclaimed register interrupts. This stops after we write
>> - * anything to the VGA MSR register. The vgacon module uses this
>> - * register all the time, so if we unbind our driver and, as a
>> - * consequence, bind vgacon, we'll get stuck in an infinite loop at
>> - * console_unlock(). So make here we touch the VGA MSR register, making
>> - * sure vgacon can keep working normally without triggering interrupts
>> - * and error messages.
>> - */
>> - if (has_vga) {
>> - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> - outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
>> - vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> - }
>> + if (has_vga)
>> + intel_vga_msr_write(dev_priv);
>
> I'd probably call this something like intel_vga_reset_io_mem().
>
> lgtm
> Reviewed-by: Ville Syrjälä <[email protected]>
Thanks, ended up pushing this as-is, sent a separate patch for the
rename.
BR,
Jani.
>
>>
>> if (irq_pipe_mask)
>> gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
>> @@ -1205,7 +1189,7 @@ static void vlv_display_power_well_init(struct
>> drm_i915_private *dev_priv)
>> intel_crt_reset(&encoder->base);
>> }
>>
>> - i915_redisable_vga_power_on(dev_priv);
>> + intel_vga_redisable_power_on(dev_priv);
>>
>> intel_pps_unlock_regs_wa(dev_priv);
>> }
>> diff --git a/drivers/gpu/drm/i915/display/intel_vga.c
>> b/drivers/gpu/drm/i915/display/intel_vga.c
>> new file mode 100644
>> index 000000000000..732568eaa988
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_vga.c
>> @@ -0,0 +1,160 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2019 Intel Corporation
>> + */
>> +
>> +#include <linux/pci.h>
>> +#include <linux/vgaarb.h>
>> +
>> +#include <drm/i915_drm.h>
>> +
>> +#include "i915_drv.h"
>> +#include "intel_vga.h"
>> +
>> +static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
>> +{
>> + if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
>> + return VLV_VGACNTRL;
>> + else if (INTEL_GEN(i915) >= 5)
>> + return CPU_VGACNTRL;
>> + else
>> + return VGACNTRL;
>> +}
>> +
>> +/* Disable the VGA plane that we never use */
>> +void intel_vga_disable(struct drm_i915_private *dev_priv)
>> +{
>> + struct pci_dev *pdev = dev_priv->drm.pdev;
>> + i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
>> + u8 sr1;
>> +
>> + /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
>> + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> + outb(SR01, VGA_SR_INDEX);
>> + sr1 = inb(VGA_SR_DATA);
>> + outb(sr1 | 1 << 5, VGA_SR_DATA);
>> + vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> + udelay(300);
>> +
>> + I915_WRITE(vga_reg, VGA_DISP_DISABLE);
>> + POSTING_READ(vga_reg);
>> +}
>> +
>> +void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
>> +{
>> + i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
>> +
>> + if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
>> + DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
>> + intel_vga_disable(dev_priv);
>> + }
>> +}
>> +
>> +void intel_vga_redisable(struct drm_i915_private *i915)
>> +{
>> + intel_wakeref_t wakeref;
>> +
>> + /*
>> + * This function can be called both from intel_modeset_setup_hw_state or
>> + * at a very early point in our resume sequence, where the power well
>> + * structures are not yet restored. Since this function is at a very
>> + * paranoid "someone might have enabled VGA while we were not looking"
>> + * level, just check if the power well is enabled instead of trying to
>> + * follow the "don't touch the power well if we don't need it" policy
>> + * the rest of the driver uses.
>> + */
>> + wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
>> + if (!wakeref)
>> + return;
>> +
>> + intel_vga_redisable_power_on(i915);
>> +
>> + intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
>> +}
>> +
>> +void intel_vga_msr_write(struct drm_i915_private *i915)
>> +{
>> + struct pci_dev *pdev = i915->drm.pdev;
>> +
>> + /*
>> + * After we re-enable the power well, if we touch VGA register 0x3d5
>> + * we'll get unclaimed register interrupts. This stops after we write
>> + * anything to the VGA MSR register. The vgacon module uses this
>> + * register all the time, so if we unbind our driver and, as a
>> + * consequence, bind vgacon, we'll get stuck in an infinite loop at
>> + * console_unlock(). So make here we touch the VGA MSR register, making
>> + * sure vgacon can keep working normally without triggering interrupts
>> + * and error messages.
>> + */
>> + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> + outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
>> + vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> +}
>> +
>> +static int
>> +intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
>> +{
>> + unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL :
>> INTEL_GMCH_CTRL;
>> + u16 gmch_ctrl;
>> +
>> + if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
>> + DRM_ERROR("failed to read control word\n");
>> + return -EIO;
>> + }
>> +
>> + if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
>> + return 0;
>> +
>> + if (enable_decode)
>> + gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
>> + else
>> + gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
>> +
>> + if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
>> + DRM_ERROR("failed to write control word\n");
>> + return -EIO;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static unsigned int
>> +intel_vga_set_decode(void *cookie, bool enable_decode)
>> +{
>> + struct drm_i915_private *i915 = cookie;
>> +
>> + intel_vga_set_state(i915, enable_decode);
>> +
>> + if (enable_decode)
>> + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
>> + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> + else
>> + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> +}
>> +
>> +int intel_vga_register(struct drm_i915_private *i915)
>> +{
>> + struct pci_dev *pdev = i915->drm.pdev;
>> + int ret;
>> +
>> + /*
>> + * If we have > 1 VGA cards, then we need to arbitrate access to the
>> + * common VGA resources.
>> + *
>> + * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
>> + * then we do not take part in VGA arbitration and the
>> + * vga_client_register() fails with -ENODEV.
>> + */
>> + ret = vga_client_register(pdev, i915, NULL, intel_vga_set_decode);
>> + if (ret && ret != -ENODEV)
>> + return ret;
>> +
>> + return 0;
>> +}
>> +
>> +void intel_vga_unregister(struct drm_i915_private *i915)
>> +{
>> + struct pci_dev *pdev = i915->drm.pdev;
>> +
>> + vga_client_register(pdev, NULL, NULL, NULL);
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_vga.h
>> b/drivers/gpu/drm/i915/display/intel_vga.h
>> new file mode 100644
>> index 000000000000..3517872e62ac
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_vga.h
>> @@ -0,0 +1,18 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2019 Intel Corporation
>> + */
>> +
>> +#ifndef __INTEL_VGA_H__
>> +#define __INTEL_VGA_H__
>> +
>> +struct drm_i915_private;
>> +
>> +void intel_vga_msr_write(struct drm_i915_private *i915);
>> +void intel_vga_disable(struct drm_i915_private *i915);
>> +void intel_vga_redisable(struct drm_i915_private *i915);
>> +void intel_vga_redisable_power_on(struct drm_i915_private *i915);
>> +int intel_vga_register(struct drm_i915_private *i915);
>> +void intel_vga_unregister(struct drm_i915_private *i915);
>> +
>> +#endif /* __INTEL_VGA_H__ */
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c
>> b/drivers/gpu/drm/i915/i915_drv.c
>> index 91aae56b4280..3306c6bb515a 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -36,7 +36,6 @@
>> #include <linux/pm_runtime.h>
>> #include <linux/pnp.h>
>> #include <linux/slab.h>
>> -#include <linux/vgaarb.h>
>> #include <linux/vga_switcheroo.h>
>> #include <linux/vt.h>
>> #include <acpi/video.h>
>> @@ -59,6 +58,7 @@
>> #include "display/intel_overlay.h"
>> #include "display/intel_pipe_crc.h"
>> #include "display/intel_sprite.h"
>> +#include "display/intel_vga.h"
>>
>> #include "gem/i915_gem_context.h"
>> #include "gem/i915_gem_ioctls.h"
>> @@ -269,19 +269,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
>> release_resource(&dev_priv->mch_res);
>> }
>>
>> -/* true = enable decode, false = disable decoder */
>> -static unsigned int i915_vga_set_decode(void *cookie, bool state)
>> -{
>> - struct drm_i915_private *dev_priv = cookie;
>> -
>> - intel_modeset_vga_set_state(dev_priv, state);
>> - if (state)
>> - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
>> - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> - else
>> - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> -}
>> -
>> static int i915_resume_switcheroo(struct drm_i915_private *i915);
>> static int i915_suspend_switcheroo(struct drm_i915_private *i915,
>> pm_message_t state);
>> @@ -346,15 +333,8 @@ static int i915_driver_modeset_probe(struct
>> drm_i915_private *i915)
>>
>> intel_bios_init(i915);
>>
>> - /* If we have > 1 VGA cards, then we need to arbitrate access
>> - * to the common VGA resources.
>> - *
>> - * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
>> - * then we do not take part in VGA arbitration and the
>> - * vga_client_register() fails with -ENODEV.
>> - */
>> - ret = vga_client_register(pdev, i915, NULL, i915_vga_set_decode);
>> - if (ret && ret != -ENODEV)
>> + ret = intel_vga_register(i915);
>> + if (ret)
>> goto out;
>>
>> intel_register_dsm_handler();
>> @@ -416,7 +396,7 @@ static int i915_driver_modeset_probe(struct
>> drm_i915_private *i915)
>> intel_power_domains_driver_remove(i915);
>> vga_switcheroo_unregister_client(pdev);
>> cleanup_vga_client:
>> - vga_client_register(pdev, NULL, NULL, NULL);
>> + intel_vga_unregister(i915);
>> out:
>> return ret;
>> }
>> @@ -430,7 +410,7 @@ static void i915_driver_modeset_remove(struct
>> drm_i915_private *i915)
>> intel_bios_driver_remove(i915);
>>
>> vga_switcheroo_unregister_client(pdev);
>> - vga_client_register(pdev, NULL, NULL, NULL);
>> + intel_vga_unregister(i915);
>>
>> intel_csr_ucode_fini(i915);
>> }
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c
>> b/drivers/gpu/drm/i915/i915_pci.c
>> index ea53dfe2fba0..1cbf3998b361 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -23,7 +23,6 @@
>> */
>>
>> #include <linux/console.h>
>> -#include <linux/vgaarb.h>
>> #include <linux/vga_switcheroo.h>
>>
>> #include <drm/drm_drv.h>
>> diff --git a/drivers/gpu/drm/i915/i915_suspend.c
>> b/drivers/gpu/drm/i915/i915_suspend.c
>> index 8508a01ad8b9..2b2086def0f1 100644
>> --- a/drivers/gpu/drm/i915/i915_suspend.c
>> +++ b/drivers/gpu/drm/i915/i915_suspend.c
>> @@ -28,6 +28,7 @@
>>
>> #include "display/intel_fbc.h"
>> #include "display/intel_gmbus.h"
>> +#include "display/intel_vga.h"
>>
>> #include "i915_drv.h"
>> #include "i915_reg.h"
>> @@ -57,7 +58,7 @@ static void i915_restore_display(struct drm_i915_private
>> *dev_priv)
>> if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
>> I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
>>
>> - i915_redisable_vga(dev_priv);
>> + intel_vga_redisable(dev_priv);
>> }
>>
>> int i915_save_state(struct drm_i915_private *dev_priv)
>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> index 2fd3c097e1f5..ad719c9602af 100644
>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> @@ -27,7 +27,6 @@
>> */
>>
>> #include <linux/pm_runtime.h>
>> -#include <linux/vgaarb.h>
>>
>> #include <drm/drm_print.h>
>>
>> --
>> 2.20.1
--
Jani Nikula, Intel Open Source Graphics Center
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