We need to configure TE interrupt in two places. Port interrupt and DSI interrupt mask registers.
Signed-off-by: Vandita Kulkarni <[email protected]> --- drivers/gpu/drm/i915/i915_irq.c | 49 ++++++++++++++++++++++++++++++++- 1 file changed, 48 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 3af7f7914c40..bfb2a63504fb 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -41,6 +41,7 @@ #include "display/intel_hotplug.h" #include "display/intel_lpe_audio.h" #include "display/intel_psr.h" +#include "display/intel_dsi.h" #include "gt/intel_gt.h" #include "gt/intel_gt_irq.h" @@ -2960,12 +2961,44 @@ int ilk_enable_vblank(struct drm_crtc *crtc) return 0; } +static void gen11_dsi_configure_te(struct drm_crtc *crtc, bool enable) +{ + struct drm_i915_private *dev_priv = to_i915(crtc->dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + struct intel_encoder *encoder = NULL; + struct intel_dsi *intel_dsi; + enum port port; + u32 tmp; + + encoder = gen11_dsi_find_cmd_mode_encoder(intel_crtc); + if (!encoder) + return; + + intel_dsi = enc_to_intel_dsi(&encoder->base); + /* Assuming single link would always be enabled on PORT_A */ + port = (intel_dsi->ports & BIT(PORT_B) & BIT(PORT_A)) ? PORT_B : PORT_A; + tmp = I915_READ(ICL_DSI_INTR_MASK_REG(port)); + if (enable) + tmp &= ~ICL_TE_EVENT; + else + tmp |= ICL_TE_EVENT; + + I915_WRITE(ICL_DSI_INTR_MASK_REG(port), tmp); +} + int bdw_enable_vblank(struct drm_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->dev); + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum pipe pipe = to_intel_crtc(crtc)->pipe; unsigned long irqflags; + if (INTEL_GEN(dev_priv) >= 11 && + (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI))) { + gen11_dsi_configure_te(crtc, true); + return 0; + } + spin_lock_irqsave(&dev_priv->irq_lock, irqflags); bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); @@ -3031,9 +3064,16 @@ void ilk_disable_vblank(struct drm_crtc *crtc) void bdw_disable_vblank(struct drm_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->dev); - enum pipe pipe = to_intel_crtc(crtc)->pipe; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + enum pipe pipe = intel_crtc->pipe; unsigned long irqflags; + if (INTEL_GEN(dev_priv) >= 11 && + (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI))) { + gen11_dsi_configure_te(crtc, false); + return; + } + spin_lock_irqsave(&dev_priv->irq_lock, irqflags); bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); @@ -3726,6 +3766,13 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) gen3_assert_iir_is_zero(uncore, EDP_PSR_IIR); } + if (INTEL_GEN(dev_priv) >= 11) { + enum port port; + + if (intel_bios_is_dsi_present(dev_priv, &port)) + de_port_masked |= ICL_DSI_0 | ICL_DSI_1; + } + for_each_pipe(dev_priv, pipe) { dev_priv->de_irq_mask[pipe] = ~de_pipe_masked; -- 2.21.0.5.gaeb582a _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
