On Fri, Oct 18, 2019 at 01:06:39PM +0100, Chris Wilson wrote:
> Probe the mocs registers for new contexts and across GPU resets. Similar
> to intel_workarounds, we have tables of what register values we expect
> to see, so verify that user contexts are affected by them. In the
> future, we should add tests similar to intel_sseu to cover dynamic
> reconfigurations.
> 
> Signed-off-by: Chris Wilson <[email protected]>
> Cc: Prathap Kumar Valsan <[email protected]>
> Cc: Mika Kuoppala <[email protected]>
> ---
> +static int check_l3cc_table(struct intel_engine_cs *engine,
> +                         const struct drm_i915_mocs_table *table,
> +                         const u32 *vaddr, int *offset)
> +{
> +     u16 unused_value = table->table[I915_MOCS_PTE].l3cc_value;
> +     unsigned int i;
> +     u32 expect;
> +
> +     if (1) { /* XXX skip MCR read back */
> +             *offset += table->n_entries / 2;
> +             return 0;
> +     }
Not checking l3cc table?

> +
> +     for (i = 0; i < table->size / 2; i++) {
> +             u16 low = get_entry_l3cc(table, 2 * i);
> +             u16 high = get_entry_l3cc(table, 2 * i + 1);
> +
> +             expect = l3cc_combine(table, low, high);
> +             if (vaddr[*offset] != expect) {
> +                     pr_err("%s: Invalid L3CC[%d] entry, found %08x, 
> expected %08x\n",
> +                            engine->name, i, vaddr[*offset], expect);
> +                     return -EINVAL;
> +             }
> +             ++*offset;
> +     }
> +
> +     /* Odd table size - 1 left over */
> +     if (table->size & 1) {
> +             u16 low = get_entry_l3cc(table, 2 * i);
> +
> +             expect = l3cc_combine(table, low, unused_value);
> +             if (vaddr[*offset] != expect) {
> +                     pr_err("%s: Invalid L3CC[%d] entry, found %08x, 
> expected %08x\n",
> +                            engine->name, i, vaddr[*offset], expect);
> +                     return -EINVAL;
> +             }
> +             ++*offset;
> +             i++;
> +     }
> +
> +     /* All remaining entries are also unused */
> +     for (; i < table->n_entries / 2; i++) {
> +             expect = l3cc_combine(table, unused_value, unused_value);
> +             if (vaddr[*offset] != expect) {
> +                     pr_err("%s: Invalid L3CC[%d] entry, found %08x, 
> expected %08x\n",
> +                            engine->name, i, vaddr[*offset], expect);
> +                     return -EINVAL;
> +             }
> +             ++*offset;
> +     }
> +
> +     return 0;
> +}
> +
> +static int check_mocs_engine(struct live_mocs *arg,
> +                          struct intel_context *ce)
> +{
> +     struct i915_vma *vma = arg->scratch;
> +     struct i915_request *rq;
> +     int offset;
> +     int err;
> +
> +     memset32(arg->vaddr, STACK_MAGIC, PAGE_SIZE / sizeof(u32));
> +
> +     rq = intel_context_create_request(ce);
> +     if (IS_ERR(rq))
> +             return PTR_ERR(rq);
> +
> +     i915_vma_lock(vma);
> +     err = i915_request_await_object(rq, vma->obj, true);
> +     if (!err)
> +             err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
> +     i915_vma_unlock(vma);
> +
> +     offset = 0;
> +     if (!err)
> +             err = read_mocs_table(rq, &arg->table, vma, &offset);
> +     if (!err && ce->engine->class == RENDER_CLASS)
> +             err = read_l3cc_table(rq, &arg->table, vma, &offset);
> +
> +     err = request_add_sync(rq, err);
> +     if (err)
> +             return err;
> +
> +     offset = 0;
> +     if (!err)
> +             err = check_mocs_table(ce->engine, &arg->table,
> +                                    arg->vaddr, &offset);
> +     if (!err && ce->engine->class == RENDER_CLASS)
> +             err = check_l3cc_table(ce->engine, &arg->table,
> +                                    arg->vaddr, &offset);
> +     if (err)
> +             return err;
> +
> +     return 0;
> +}
> +
> +static int live_mocs_clean(void *arg)
> +{
> +     struct intel_gt *gt = arg;
> +     struct intel_engine_cs *engine;
> +     enum intel_engine_id id;
> +     struct live_mocs mocs;
> +     int err;
> +
> +     err = live_mocs_init(&mocs, gt);
> +     if (err)
> +             return err;
> +
> +     for_each_engine(engine, gt, id) {
> +             struct intel_context *ce;
> +
> +             ce = intel_context_create(engine->kernel_context->gem_context,
> +                                       engine);
> +             if (IS_ERR(ce)) {
> +                     err = PTR_ERR(ce);
> +                     break;
> +             }
> +
> +             err = check_mocs_engine(&mocs, ce);
> +             intel_context_put(ce);
Need a _get() to pair with _put()?

> +             if (err)
> +                     break;
> +     }
> +
> +     live_mocs_fini(&mocs);
> +
> +     return err;
> +}
> +
[snip]
> diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h 
> b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> index 6daf6599ec79..1a6abcffce81 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
> @@ -16,6 +16,7 @@ selftest(gt_engines, intel_engine_live_selftests)
>  selftest(gt_timelines, intel_timeline_live_selftests)
>  selftest(gt_contexts, intel_context_live_selftests)
>  selftest(gt_lrc, intel_lrc_live_selftests)
> +selftest(gt_mocs, intel_mocs_live_selftests)
>  selftest(gt_pm, intel_gt_pm_live_selftests)
>  selftest(requests, i915_request_live_selftests)
>  selftest(active, i915_active_live_selftests)

Regards,
Prathap
> -- 
> 2.23.0
> 
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