== Series Details ==
Series: drm/i915: Enable second dbuf slice for ICL and TGL (rev2)
URL : https://patchwork.freedesktop.org/series/69124/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f9ab97f3257e drm/i915: Enable second dbuf slice for ICL and TGL
-:260: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional
statements (8, 0)
#260: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:311:
for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
[...]
+u8 intel_dbuf_max_slices(struct drm_i915_private *dev_priv);
-:506: WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
#506: FILE: drivers/gpu/drm/i915/intel_pm.c:3953:
+ u32 pipe_dbuf_slice_mask = \
-:508: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#508: FILE: drivers/gpu/drm/i915/intel_pm.c:3955:
+ i915_get_allowed_dbuf_mask(dev_priv,
+ pipe,
-:624: CHECK:LINE_SPACING: Please don't use multiple blank lines
#624: FILE: drivers/gpu/drm/i915/intel_pm.c:4303:
+
+
-:628: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#628: FILE: drivers/gpu/drm/i915/intel_pm.c:4307:
+ DRM_DEBUG_KMS("Pipe %d downscale amount %d.%d\n",
+ crtc->pipe, pipe_downscale.val >> 16,
-:647: CHECK:LINE_SPACING: Please don't use multiple blank lines
#647: FILE: drivers/gpu/drm/i915/intel_pm.c:4326:
+
+
-:648: CHECK:CAMELCASE: Avoid CamelCase: <DBuf1>
#648: FILE: drivers/gpu/drm/i915/intel_pm.c:4327:
+#define ICL_PIPE_A_DBUF_SLICES(DBuf1) \
-:656: CHECK:CAMELCASE: Avoid CamelCase: <DBuf2>
#656: FILE: drivers/gpu/drm/i915/intel_pm.c:4335:
+#define ICL_PIPE_AB_DBUF_SLICES(DBuf1, DBuf2) \
-:668: CHECK:CAMELCASE: Avoid CamelCase: <DBuf3>
#668: FILE: drivers/gpu/drm/i915/intel_pm.c:4347:
+#define ICL_PIPE_ABC_DBUF_SLICES(DBuf1, DBuf2, DBuf3) \
-:678: CHECK:CAMELCASE: Avoid CamelCase: <DBuf4>
#678: FILE: drivers/gpu/drm/i915/intel_pm.c:4357:
+#define ICL_PIPE_ABCD_DBUF_SLICES(DBuf1, DBuf2, DBuf3, DBuf4) \
-:787: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#787: FILE: drivers/gpu/drm/i915/intel_pm.c:4466:
+u32 i915_get_allowed_dbuf_mask(struct drm_i915_private *dev_priv,
+ int pipe, u32 active_pipes,
total: 0 errors, 2 warnings, 9 checks, 712 lines checked
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