Move intel_dp_source_supports_dsc() from intel_dp.c as
intel_dsc_source_support() in intel_vdsc.c. The DSC source support is
more about DSC than about DP, and will be needed for DP independent
code.

Cc: Manasi Navare <[email protected]>
Cc: Vandita Kulkarni <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 27 +++++------------------
 drivers/gpu/drm/i915/display/intel_vdsc.c | 19 ++++++++++++++++
 drivers/gpu/drm/i915/display/intel_vdsc.h |  2 ++
 3 files changed, 26 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index f7e618ec6fa3..2f31d226c6eb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1889,32 +1889,15 @@ static bool intel_dp_supports_fec(struct intel_dp 
*intel_dp,
                drm_dp_sink_supports_fec(intel_dp->fec_capable);
 }
 
-static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp,
-                                        const struct intel_crtc_state 
*pipe_config)
-{
-       struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-
-       if (!INTEL_INFO(dev_priv)->display.has_dsc)
-               return false;
-
-       /* On TGL, DSC is supported on all Pipes */
-       if (INTEL_GEN(dev_priv) >= 12)
-               return true;
-
-       if (INTEL_GEN(dev_priv) >= 10 &&
-           pipe_config->cpu_transcoder != TRANSCODER_A)
-               return true;
-
-       return false;
-}
-
 static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
-                                 const struct intel_crtc_state *pipe_config)
+                                 const struct intel_crtc_state *crtc_state)
 {
-       if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable)
+       struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+
+       if (!intel_dp_is_edp(intel_dp) && !crtc_state->fec_enable)
                return false;
 
-       return intel_dp_source_supports_dsc(intel_dp, pipe_config) &&
+       return intel_dsc_source_support(encoder, crtc_state) &&
                drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 7bd727129a8f..a1b0f7cf1a96 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -334,6 +334,25 @@ static const struct rc_parameters *get_rc_params(u16 
compressed_bpp,
        return &rc_parameters[row_index][column_index];
 }
 
+bool intel_dsc_source_support(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state)
+{
+       struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+       if (!INTEL_INFO(i915)->display.has_dsc)
+               return false;
+
+       /* On TGL, DSC is supported on all Pipes */
+       if (INTEL_GEN(i915) >= 12)
+               return true;
+
+       if (INTEL_GEN(i915) >= 10 &&
+           crtc_state->cpu_transcoder != TRANSCODER_A)
+               return true;
+
+       return false;
+}
+
 int intel_dsc_compute_params(struct intel_encoder *encoder,
                             struct intel_crtc_state *pipe_config)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h 
b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 4ed2256750c3..e6e9f5b5c6ff 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -9,6 +9,8 @@
 struct intel_encoder;
 struct intel_crtc_state;
 
+bool intel_dsc_source_support(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state);
 void intel_dsc_enable(struct intel_encoder *encoder,
                      const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to