On Tue, Dec 17, 2019 at 05:42:08PM -0800, Lucas De Marchi wrote: > We are currently using a mix of platform name and acronym to name the > functions. Let's prefer the acronym as it should be clear what platform > it's about and it's shorter, so it doesn't go over 80 columns in a few > cases. This converts ironlake to ilk where appropriate. > > Signed-off-by: Lucas De Marchi <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_crt.c | 6 +- > drivers/gpu/drm/i915/display/intel_display.c | 172 +++++++++--------- > drivers/gpu/drm/i915/display/intel_display.h | 2 +- > drivers/gpu/drm/i915/display/intel_dp.c | 34 ++-- > .../drm/i915/display/intel_fifo_underrun.c | 6 +- > 5 files changed, 110 insertions(+), 110 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c > b/drivers/gpu/drm/i915/display/intel_crt.c > index 7a2d36905155..853068b9f909 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -343,7 +343,7 @@ intel_crt_mode_valid(struct drm_connector *connector, > > /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */ > if (HAS_PCH_LPT(dev_priv) && > - (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2)) > + ilk_get_lanes_required(mode->clock, 270000, 24) > 2) > return MODE_CLOCK_HIGH; > > /* HSW/BDW FDI limited to 4k */ > @@ -419,7 +419,7 @@ static int hsw_crt_compute_config(struct intel_encoder > *encoder, > return 0; > } > > -static bool intel_ironlake_crt_detect_hotplug(struct drm_connector > *connector) > +static bool ilk_crt_detect_hotplug(struct drm_connector *connector) > { > struct drm_device *dev = connector->dev; > struct intel_crt *crt = intel_attached_crt(connector); > @@ -527,7 +527,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector > *connector) > int i, tries = 0; > > if (HAS_PCH_SPLIT(dev_priv)) > - return intel_ironlake_crt_detect_hotplug(connector); > + return ilk_crt_detect_hotplug(connector); > > if (IS_VALLEYVIEW(dev_priv)) > return valleyview_crt_detect_hotplug(connector); > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index d3a13737552a..a4f516bc850f 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -145,8 +145,8 @@ static const u64 cursor_format_modifiers[] = { > > static void i9xx_crtc_clock_get(struct intel_crtc *crtc, > struct intel_crtc_state *pipe_config); > -static void ironlake_pch_clock_get(struct intel_crtc *crtc, > - struct intel_crtc_state *pipe_config); > +static void ilk_pch_clock_get(struct intel_crtc *crtc, > + struct intel_crtc_state *pipe_config); > > static int intel_framebuffer_init(struct intel_framebuffer *ifb, > struct drm_i915_gem_object *obj, > @@ -157,7 +157,7 @@ static void intel_cpu_transcoder_set_m_n(const struct > intel_crtc_state *crtc_sta > const struct intel_link_m_n *m_n, > const struct intel_link_m_n *m2_n2); > static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state); > -static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state); > +static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state); > static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state); > static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state); > static void vlv_prepare_pll(struct intel_crtc *crtc, > @@ -167,8 +167,8 @@ static void chv_prepare_pll(struct intel_crtc *crtc, > static void intel_crtc_init_scalers(struct intel_crtc *crtc, > struct intel_crtc_state *crtc_state); > static void skl_pfit_enable(const struct intel_crtc_state *crtc_state); > -static void ironlake_pfit_disable(const struct intel_crtc_state > *old_crtc_state); > -static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state); > +static void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state); > +static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state); > static void intel_modeset_setup_hw_state(struct drm_device *dev, > struct drm_modeset_acquire_ctx *ctx); > > @@ -404,7 +404,7 @@ static const struct intel_limit > intel_limits_pineview_lvds = { > * We calculate clock using (register_value + 2) for N/M1/M2, so here > * the range value for them is (actual_value - 2). > */ > -static const struct intel_limit intel_limits_ironlake_dac = { > +static const struct intel_limit intel_limits_ilk_dac = {
These could be further shortened to just ilk_limits_dac etc. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
