On Thu, Jan 16, 2020 at 01:45:44PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä <[email protected]> > > If the pcode fails to give us the goods on any of the QGV points just > declare that we have none so that we'll properly ignore the bw limits.
Should we also try to sanitize that the actual point info returned is sane? E.g., if the pcode read didn't fail, but we just received a zeroed out QGV point structure, we'd probably want to disregard it as well? Matt > > Cc: Clinton A Taylor <[email protected]> > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_bw.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c > b/drivers/gpu/drm/i915/display/intel_bw.c > index b228671d5a5d..eb9281e1831c 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -129,8 +129,10 @@ static int icl_get_qgv_points(struct drm_i915_private > *dev_priv, > struct intel_qgv_point *sp = &qi->points[i]; > > ret = icl_pcode_read_qgv_point_info(dev_priv, sp, i); > - if (ret) > + if (ret) { > + qi->num_points = 0; > return ret; > + } > > DRM_DEBUG_KMS("QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d > tRC=%d\n", > i, sp->dclk, sp->t_rp, sp->t_rdpre, sp->t_ras, > -- > 2.24.1 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
