On Fri, 24 Jan 2020, Matt Roper <[email protected]> wrote: > On Fri, Jan 24, 2020 at 03:25:26PM +0200, Jani Nikula wrote: >> @@ -151,20 +151,20 @@ static void cnl_combo_phys_init(struct >> drm_i915_private *dev_priv) >> { >> u32 val; >> >> - val = I915_READ(CHICKEN_MISC_2); >> + val = intel_de_read(dev_priv, CHICKEN_MISC_2); >> val &= ~CNL_COMP_PWR_DOWN; >> - I915_WRITE(CHICKEN_MISC_2, val); >> + intel_de_write(dev_priv, CHICKEN_MISC_2, val); >> >> /* Dummy PORT_A to get the correct CNL register from the ICL macro */ >> cnl_set_procmon_ref_values(dev_priv, PHY_A); >> >> - val = I915_READ(CNL_PORT_COMP_DW0); >> + val = intel_de_read(dev_priv, CNL_PORT_COMP_DW0); >> val |= COMP_INIT; >> - I915_WRITE(CNL_PORT_COMP_DW0, val); >> + intel_de_write(dev_priv, CNL_PORT_COMP_DW0, val); > > Drive by comment...could some fancier coccinelle usage change these to > intel_de_rmw() instead? We have a lot of rmw behavior for PHY > registers, and I believe some for pre-ilk watermarks and clock gating > workarounds in intel_pm.c too.
I decided I wanted to get these merged, as folks seemed to agree with the approach. The fancy cocci would take a while to figure out. But I'll look into it as a follow-up. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
