Previously known by the WA number - Wa_1607090982, extend
the WA (Disable Early Read and Src Swap (bit 14) by
setting the chicken register.) to all steppings.
The WA is implemented in -
3873fd1a43c7 ("drm/i915: Use engine wa list for Wa_1607090982")
Bspec: 46045,52890
Cc: Mika Kuoppala <[email protected]>
Signed-off-by: Anusha Srivatsa <[email protected]>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 887e0dc701f7..7cc8a7fc53c7 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1329,6 +1329,13 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
struct i915_wa_list *wal)
{
struct drm_i915_private *i915 = engine->i915;
+ if (IS_TIGERLAKE(i915)) {
+ /* Wa_1606931601:tgl */
+ wa_masked_en(wal,
+ GEN7_ROW_CHICKEN2,
+ GEN12_DISABLE_EARLY_READ);
+ }
+
if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0)) {
/* Wa_1606700617:tgl */
wa_masked_en(wal,
@@ -1360,11 +1367,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
struct i915_wa_list *wal)
wa_write_or(wal,
GEN7_FF_THREAD_MODE,
GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
-
- /* Wa_1606931601:tgl */
- wa_masked_en(wal,
- GEN7_ROW_CHICKEN2,
- GEN12_DISABLE_EARLY_READ);
}
if (IS_GEN(i915, 11)) {
--
2.25.0
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