Just remembered that Ken reviewed those 3 patches on IRC. So pushed them. -- Damien
On Wed, Feb 20, 2013 at 12:11:48PM +0000, Damien Lespiau wrote: > Signed-off-by: Damien Lespiau <[email protected]> > --- > intel/intel_aub.h | 76 > +++++++++++++++++++++++++++++++++++++---------------- > 1 files changed, 53 insertions(+), 23 deletions(-) > > diff --git a/intel/intel_aub.h b/intel/intel_aub.h > index a36fd53..5f0aba8 100644 > --- a/intel/intel_aub.h > +++ b/intel/intel_aub.h > @@ -93,29 +93,59 @@ > #define AUB_TRACE_MEMTYPE_GTT_ENTRY (4 << 16) > > /* DW2 */ > -// operation = TRACE_DATA_WRITE, Type = TRACE_DATA_WRITE_GENERAL_STATE > -#define AUB_TRACE_GENERAL_STATE_MASK 0x000000ff > - > -#define AUB_TRACE_VS_STATE 0x00000001 > -#define AUB_TRACE_GS_STATE 0x00000002 > -#define AUB_TRACE_CL_STATE 0x00000003 > -#define AUB_TRACE_SF_STATE 0x00000004 > -#define AUB_TRACE_WM_STATE 0x00000005 > -#define AUB_TRACE_CC_STATE 0x00000006 > -#define AUB_TRACE_CL_VP 0x00000007 > -#define AUB_TRACE_SF_VP 0x00000008 > -#define AUB_TRACE_CC_VP 0x00000009 > -#define AUB_TRACE_SAMPLER_STATE 0x0000000a > -#define AUB_TRACE_KERNEL 0x0000000b > -#define AUB_TRACE_SCRATCH 0x0000000c > -#define AUB_TRACE_SDC 0x0000000d > -#define AUB_TRACE_BLEND_STATE 0x00000016 > -#define AUB_TRACE_DEPTH_STENCIL_STATE 0x00000017 > - > -// operation = TRACE_DATA_WRITE, Type = TRACE_DATA_WRITE_SURFACE_STATE > -#define AUB_TRACE_SURFACE_STATE_MASK 0x00000ff00 > -#define AUB_TRACE_BINDING_TABLE 0x000000100 > -#define AUB_TRACE_SURFACE_STATE 0x000000200 > + > +/** > + * aub_state_struct_type enum values are encoded with the top 16 bits > + * representing the type to be delivered to the .aub file, and the bottom 16 > + * bits representing the subtype. This macro performs the encoding. > + */ > +#define ENCODE_SS_TYPE(type, subtype) (((type) << 16) | (subtype)) > + > +enum aub_state_struct_type { > + AUB_TRACE_VS_STATE = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 1), > + AUB_TRACE_GS_STATE = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 2), > + AUB_TRACE_CLIP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 3), > + AUB_TRACE_SF_STATE = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 4), > + AUB_TRACE_WM_STATE = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 5), > + AUB_TRACE_CC_STATE = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 6), > + AUB_TRACE_CLIP_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 7), > + AUB_TRACE_SF_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 8), > + AUB_TRACE_CC_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0x9), > + AUB_TRACE_SAMPLER_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0xa), > + AUB_TRACE_KERNEL_INSTRUCTIONS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0xb), > + AUB_TRACE_SCRATCH_SPACE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0xc), > + AUB_TRACE_SAMPLER_DEFAULT_COLOR = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0xd), > + > + AUB_TRACE_SCISSOR_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0x15), > + AUB_TRACE_BLEND_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0x16), > + AUB_TRACE_DEPTH_STENCIL_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, > 0x17), > + > + AUB_TRACE_VERTEX_BUFFER = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_VERTEX_BUFFER, 0), > + AUB_TRACE_BINDING_TABLE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE, > 0x100), > + AUB_TRACE_SURFACE_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE, > 0x200), > + AUB_TRACE_VS_CONSTANTS = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER, 0), > + AUB_TRACE_WM_CONSTANTS = > ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER, 1), > +}; > + > +#undef ENCODE_SS_TYPE > + > +/** > + * Decode a aub_state_struct_type value to determine the type that should be > + * stored in the .aub file. > + */ > +static inline uint32_t AUB_TRACE_TYPE(enum aub_state_struct_type ss_type) > +{ > + return (ss_type & 0xFFFF0000) >> 16; > +} > + > +/** > + * Decode a state_struct_type value to determine the subtype that should be > + * stored in the .aub file. > + */ > +static inline uint32_t AUB_TRACE_SUBTYPE(enum aub_state_struct_type ss_type) > +{ > + return ss_type & 0xFFFF; > +} > > /* DW3: address */ > /* DW4: len */ > -- > 1.7.7.5 > _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
